Re: [PATCH v4] KVM: selftests: Test TPR / CR8 sync and interrupt masking

[Maciej S. Szmigiero]

On 5.12.2025 23:49, Sean Christopherson wrote:
> From: Maciej S. Szmigiero <maciej.szmigiero@xxxxxxxxxx>
>
> Add a few extra TPR / CR8 tests to x86's xapic_state_test to see if:
>    * TPR is 0 on reset,
>    * TPR, PPR and CR8 are equal inside the guest,
>    * TPR and CR8 read equal by the host after a VMExit
>    * TPR borderline values set by the host correctly mask interrupts in the
>      guest.
>
> These hopefully will catch the most obvious cases of improper TPR sync or
> interrupt masking.
>
> Do these tests both in x2APIC and xAPIC modes.
> The x2APIC mode uses SELF_IPI register to trigger interrupts to give it a
> bit of exercise too.
>
> Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@xxxxxxxxxx>
> Acked-by: Naveen N Rao (AMD) <naveen@xxxxxxxxxx>
> [sean: put code in separate test]
> Signed-off-by: Sean Christopherson <seanjc@xxxxxxxxxx>
> ---
>
> Maciej's TPR test.  The only change relative to v3 (well, the only intended
> change :-D) is to move the testcase to its own test.  IMO, it's cleaner for
> both this test and the existing xapic_state_test (which I plan on splitting
> up at some point).
Thanks Sean for the updated test.

I see that besides the TPR testcase being separated into its own test some
things were renamed and also GUEST_SYNC() parameter meaning was inverted.

Anyway, I re-tested the separated test (including on a kernel that's un-fixed
with respect to the AVIC TPR sync to make it fail) and the test still seems
to do its job properly.

Thanks,
Maciej