[PATCH] arm64: dts: qcom: sm8750: Add capacity and DPC properties

[Ankit Sharma]

The "capacity-dmips-mhz" and "dynamic-power-coefficient" are
used to build Energy Model which in turn is used by EAS to take
placement decisions.

Signed-off-by: Ankit Sharma <ankit.sharma@xxxxxxxxxxxxxxxx>
---
 arch/arm64/boot/dts/qcom/sm8750.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
index 3f0b57f428bb..c93511bf4625 100644
--- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
@@ -37,6 +37,8 @@ cpu0: cpu@0 {
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd0>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1792>;
+			dynamic-power-coefficient = <238>;

 			l2_0: l2-cache {
 				compatible = "cache";
@@ -53,6 +55,8 @@ cpu1: cpu@100 {
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd1>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1792>;
+			dynamic-power-coefficient = <238>;
 		};

 		cpu2: cpu@200 {
@@ -63,6 +67,8 @@ cpu2: cpu@200 {
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd2>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1792>;
+			dynamic-power-coefficient = <238>;
 		};

 		cpu3: cpu@300 {
@@ -73,6 +79,8 @@ cpu3: cpu@300 {
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd3>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1792>;
+			dynamic-power-coefficient = <238>;
 		};

 		cpu4: cpu@400 {
@@ -83,6 +91,8 @@ cpu4: cpu@400 {
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd4>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1792>;
+			dynamic-power-coefficient = <238>;
 		};

 		cpu5: cpu@500 {
@@ -93,6 +103,8 @@ cpu5: cpu@500 {
 			next-level-cache = <&l2_0>;
 			power-domains = <&cpu_pd5>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1792>;
+			dynamic-power-coefficient = <238>;
 		};

 		cpu6: cpu@10000 {
@@ -103,6 +115,8 @@ cpu6: cpu@10000 {
 			next-level-cache = <&l2_1>;
 			power-domains = <&cpu_pd6>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1894>;
+			dynamic-power-coefficient = <588>;

 			l2_1: l2-cache {
 				compatible = "cache";
@@ -119,6 +133,8 @@ cpu7: cpu@10100 {
 			next-level-cache = <&l2_1>;
 			power-domains = <&cpu_pd7>;
 			power-domain-names = "psci";
+			capacity-dmips-mhz = <1894>;
+			dynamic-power-coefficient = <588>;
 		};

 		cpu-map {
--
2.43.0