Re: [PATCH RESEND 5/5] KVM: x86: selftests: Fix write MSR_TSC_AUX reserved bits test failure on Hygon

[Zhiquan Li]

On 2/11/26 04:02, Sean Christopherson wrote:
> Gah, I think I tested -rdpid and -rdtscp in a VM on Intel, but not AMD.  I think
> the fix is just this:
> 
> diff --git a/tools/testing/selftests/kvm/x86/msrs_test.c b/tools/testing/
> selftests/kvm/x86/msrs_test.c
> index 40d918aedce6..ebd900e713c1 100644
> --- a/tools/testing/selftests/kvm/x86/msrs_test.c
> +++ b/tools/testing/selftests/kvm/x86/msrs_test.c
> @@ -175,7 +175,7 @@ void guest_test_reserved_val(const struct kvm_msr *msr)
>          * If the CPU will truncate the written value (e.g. SYSENTER on AMD),
>          * expect success and a truncated value, not #GP.
>          */
> - if (!this_cpu_has(msr->feature) ||
> + if ((!this_cpu_has(msr->feature) && !this_cpu_has(msr->feature2)) ||
>             msr->rsvd_val == fixup_rdmsr_val(msr->index, msr->rsvd_val)) {
>                 u8 vec = wrmsr_safe(msr->index, msr->rsvd_val);

Perfect!  You found the root cause and fixed it.
I’ve verified the fix on Hygon platform, I will test it on Intel and AMD
platforms as well to make sure there is no regression.
I’m going to include the you fix in the V2 series.  Since my modifications are
totally miss the point, I will remove my SoB and only add my “Reported-by:” tag,
I suppose the SoB position would be wait for you, Sean :-)

Great many thanks for your help for the whole series!!

Best Regards,
Zhiquan