Re: [PATCH] x86/cpu/centaur: Disable X86_FEATURE_FSGSBASE on Zhaoxin C4600

[Andrew Cooper]

On 28/02/2026 5:37 pm, Yao Zi wrote:
> Zhaoxin C4600, which names itself as CentaurHauls, claims
> X86_FEATURE_FSGSBASE support in CPUID, while execution of fsgsbase-
> related instructions fails with #UD exception. This will cause kernel
> to crash early in current_save_fsgs().

#UD is the expected behaviour of the FSGS instructions if they're not
enabled.

Are you saying that this specific CPU enumerates FSGSBASE in CPUID, and
permits setting CR4.FSGSBASE (without #GP for a reserved bit), and the
FSGS instructions still do not function?

What happens if you read CR4 back after trying to set the bit?

~Andrew