[PATCH net-next v6 2/5] ARM: dts: aspeed-g6: add aspeed,scu property for MAC
From: Jacky Chou
Date: Mon Mar 02 2026 - 05:33:23 EST
Add aspeed,scu property to let MAC driver to configure RGMII delay with
scu register.
Signed-off-by: Jacky Chou <jacky_chou@xxxxxxxxxxxxxx>
---
arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
index 189bc3bbb47c..cbcdc1c6eadb 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
@@ -235,6 +235,7 @@ mac0: ethernet@1e660000 {
reg = <0x1e660000 0x180>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
+ aspeed,scu = <&syscon>;
status = "disabled";
};
@@ -243,6 +244,7 @@ mac1: ethernet@1e680000 {
reg = <0x1e680000 0x180>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
+ aspeed,scu = <&syscon>;
status = "disabled";
};
@@ -251,6 +253,7 @@ mac2: ethernet@1e670000 {
reg = <0x1e670000 0x180>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
+ aspeed,scu = <&syscon>;
status = "disabled";
};
@@ -259,6 +262,7 @@ mac3: ethernet@1e690000 {
reg = <0x1e690000 0x180>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
+ aspeed,scu = <&syscon>;
status = "disabled";
};
--
2.34.1