RE: [PATCH v3 net-next 1/3] net: enetc: set the external PHY address in IERB for port MDIO usage

[Wei Fang]

> > > > AFAIU, the PHY address 0 is a special address, below is the description of
> > > > PHYAD from IEEE 802.3 Clause 22.
> > > >
> > > > A PHY that is connected to the station management entity via the
> > > > mechanical interface defined in 22.6 shall always respond to transactions
> > > > addressed to PHY Address zero <00000>. A station management entity
> > > > that is attached to multiple PHYs must have prior knowledge of the
> > > > appropriate PHY Address for each PHY.
> > > >
> > > > Therefore, for most PHYs, PHY address 0 is typically used as the broadcast
> > > > address or default response address. In designs that control multiple PHYs
> > > > via EMDIO, it is recommended to avoid setting a specific PHY to address 0
> > > > to prevent bus conflicts.
> > >
> > > I know about this special meaning, but there are hardware design which do
> not
> > > take this into account.
> >
> > This might cause potential issues, as all PHYs attached to the same MDIO bus
> will
> > respond to the accesses to PHY address 0.
> 
> Is that really the case? So far we didn't have any problems with
> PHYAD 0 and 3 on the same bus. I did a bit of research but couldn't find any
> information backing that PHYAD 0 is actually a broadcast address. All I could
> find is the case with just a single PHY on a MDIO bus, defaulting to 0.
> 

There is no problem if there is only a single PHY on the bus. But if there are
multiple PHYs, as address 0 is the default response address, there PHYs will
respond to transactions addressed to PHY address 0.

The reason you didn't see the problem is because the two PHYs on your
boards are the same model, so their configurations are identical. However,
if you disable the PHY with address 0 via the MDIO bus, both PHYs might
be disabled.

> > Is this problem unfixable?
> 
> Right now our problem is that the software doesn't work any more.
> 

I'm sorry, but I still recommend against using address 0 when there are
multiple PHYs on the MDIO bus.