Re: [PATCH v2] ARM: dts: renesas: r9a06g032: Add support for CPU frequency scaling

[Herve Codina]

On Mon, 2 Mar 2026 18:04:36 +0100
Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:

> Hi Hervé,
> 
> On Thu, 15 Jan 2026 at 17:49, Herve Codina (Schneider Electric)
> <herve.codina@xxxxxxxxxxx> wrote:
> > In RZ/N1 SoCs, CPUs are allowed to work at 125, 250 or 500 MHz when the
> > 'ref' clock frequency value is set to 500 MHz which is the default 'ref'
> > clock frequency value.
> >
> > Add support for CPU frequency scaling defining those 3 frequencies in
> > the opp-table with the assumption that the 'ref' clock is set to its
> > default value.
> >
> > Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@xxxxxxxxxxx>  
> 
> Thanks for your patch, which LGTM.
> 
> > --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi
> > +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi  
> 
> > @@ -24,6 +57,7 @@ cpu@0 {
> >                         compatible = "arm,cortex-a7";
> >                         reg = <0>;
> >                         clocks = <&sysctrl R9A06G032_CLK_A7MP>;
> > +                       operating-points-v2 = <&cpu_opp_table>;
> >                 };
> >
> >                 cpu@1 {  
> 
> Unless I am missing something, the RZ/N1 clock driver does not support
> the A7MP clock yet, so how can cpufreq work for you?

R9A06G032_CLK_A7MP is DIV_CA7

https://elixir.bootlin.com/linux/v6.19.3/source/include/dt-bindings/clock/r9a06g032-sysctrl.h#L78
https://elixir.bootlin.com/linux/v6.19.3/source/drivers/clk/renesas/r9a06g032-clocks.c#L261
https://elixir.bootlin.com/linux/v6.19.3/source/drivers/clk/renesas/r9a06g032-clocks.c#L455

And on my system, got the following:
  # cat /sys/devices/system/cpu/cpufreq/policy0/stats/time_in_state 
  125000 4574
  250000 108
  500000 392
  #

All defined opp-hz values seems to be used without any errors. I hope that
any errors would be reported in kernel logs. At least this one:
  https://elixir.bootlin.com/linux/v6.19.3/source/drivers/cpufreq/cpufreq.c#L2329


Best regards,
Hervé