Re: [PATCH RESEND 1/2] arm64: dts: rockchip: rk3308: Add gpio-ranges properties

[Jonas Karlman]

Hi Matthijs,

On 3/2/2026 9:17 PM, Matthijs Kooijman wrote:
> This makes the mapping between gpio and pinctrl explicit.
> 
> This does not immediately change functionality, because the
> gpio-rockchip.c driver has a workaround that defines ranges when they
> are not present in DT, but that relies on global gpio numbering (so
> AFAICS only works when the rockchip gpio banks are initialized first and
> in-order).

This is strictly not correct, the driver use the gpioX alias id as
defined in the device tree and does not depend on the initialization
order.

This file explicitly define the aliases matching the hardware:

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		[...]
	};

> 
> Signed-off-by: Matthijs Kooijman <matthijs@xxxxxxxx>
> ---
>  arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> index 31c25de2d689c..681d2429d541d 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
> @@ -889,6 +889,7 @@ gpio0: gpio@ff220000 {
>  			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&cru PCLK_GPIO0>;
>  			gpio-controller;
> +			gpio-ranges = <&pinctrl 0 0 32>;

This matches the driver, but not the hardware according to datasheet, it
only lists gpio0 A0-C5 used, and not all 32 pins supported by the gpio0
controller.

>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> @@ -900,6 +901,7 @@ gpio1: gpio@ff230000 {
>  			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&cru PCLK_GPIO1>;
>  			gpio-controller;
> +			gpio-ranges = <&pinctrl 0 32 32>;

Same here, the datasheet only lists gpio1 A0-D1 used, and not all 32
pins supported by the gpio1 controller.

>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> @@ -911,6 +913,7 @@ gpio2: gpio@ff240000 {
>  			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&cru PCLK_GPIO2>;
>  			gpio-controller;
> +			gpio-ranges = <&pinctrl 0 64 32>;

Same here, the datasheet only lists gpio1 A0-C0 used, and not all 32
pins supported by the gpio2 controller.

>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> @@ -922,6 +925,7 @@ gpio3: gpio@ff250000 {
>  			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&cru PCLK_GPIO3>;
>  			gpio-controller;
> +			gpio-ranges = <&pinctrl 0 96 32>;

Same here, the datasheet only lists gpio1 A0-B5 used, and not all 32
pins supported by the gpio3 controller.

>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> @@ -933,6 +937,7 @@ gpio4: gpio@ff260000 {
>  			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&cru PCLK_GPIO4>;
>  			gpio-controller;
> +			gpio-ranges = <&pinctrl 0 128 32>;

Same here, the datasheet only lists gpio1 A0-C1 and D0-D7 used, and not
all 32 pins supported by the gpio4 controller.

Regards,
Jonas

>  			#gpio-cells = <2>;
>  			interrupt-controller;
>  			#interrupt-cells = <2>;