Re: [PATCH v2 4/5] PCI: tegra194: Expose BAR2 (MSI-X) and BAR4 (DMA) as 64-bit BAR_RESERVED

[Niklas Cassel]

On Tue, Mar 03, 2026 at 12:50:03PM +0530, Manikanta Maddireddy wrote:
> Tegra Endpoint exposes three 64-bit BARs at indices 0, 2, and 4:
> - BAR0+BAR1: EPF test/data (programmable 64-bit BAR)
> - BAR2+BAR3: MSI-X table (hardware-backed)
> - BAR4+BAR5: DMA registers (hardware-backed)
> 
> Update tegra_pcie_epc_features so that BAR2 is BAR_RESERVED with
> PCI_EPC_BAR_RSVD_MSIX_TBL_RAM (64 KB) & PCI_EPC_BAR_RSVD_MSIX_PBA_RAM (64 KB),
> BAR3 is BAR_64BIT_UPPER, BAR4 is BAR_RESERVED with
> PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO (4KB), and BAR5 is BAR_64BIT_UPPER.
> This keeps CONSECUTIVE_BAR_TEST working while allowing the host to use
> 64-bit BAR2 (MSI-X) and BAR4 (DMA).
> 
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@xxxxxxxxxx>
> ---

Reviewed-by: Niklas Cassel <cassel@xxxxxxxxxx>