Re: [PATCH] iommu/amd: Adhere to IVINFO[VASIZE] for address limits
From: Ankit Soni
Date: Tue Mar 03 2026 - 12:14:29 EST
On Tue, Mar 03, 2026 at 08:05:54AM -0400, Jason Gunthorpe wrote:
> On Tue, Mar 03, 2026 at 11:47:21AM +0000, Ankit Soni wrote:
>
> > > > + /*
> > > > + * IVINFO[VASIZE] encodes the log2 of the maximum virtual address
> > > > + * processed by the IOMMU.
> > > > + */
> > > > + switch (vasize) {
> > > > + case 32:
> > > > + case 40:
> > > > + case 48:
> > > > + case 64:
> > > > + return vasize;
> > > > + default:
> > > > + pr_warn_once("IVRS: IVINFO[VASIZE]=0x%x is invalid, defaulting to 64‑bit VA\n",
> > > > + vasize);
> > > > + return 64;
> > >
> > > Why check and limit it like this?
> > >
> >
> > I’ll replace this with a macro and send that in v3. If you have other suggestions,
> > I’m happy to incorporate.
> >
> > > > - cfg.common.hw_max_vasz_lg2 =
> > > > - min(64, (amd_iommu_hpt_level - 1) * 9 + 21);
> > > > + cfg.common.hw_max_vasz_lg2 = amd_iommu_hpt_vasize;
> > >
> > > This has no restriction, you can send it whatever size you want.
> > >
> >
> > The intent is for the kernel to respect what the VM advertises in IVINFO.
> > If we ignore IVINFO[VASIZE] and use a larger limit (i.e. from EFR only),
> > driver can exceed vasize what the VM allows and break the guest.
>
> I mean if FIELD_GET(IOMMU_IVINFO_VASIZE, amd_iommu_ivinfo) is 35 why
> not just pass it to hw_max_vasz_lg2 and be done with it? What is the
> point of limiting to only a few values?
>
> Jason
I got your point, i added the check to match the spec, which defines valid
values are only 32, 40, 48, and 64.
Ankit