[PATCH 8/8] staging: sm750fb: remove unused GPIO bit field and interrupt definitions
From: Gabriel Windlin
Date: Tue Mar 03 2026 - 18:28:38 EST
The GPIO_DATA_0..31, GPIO_DATA_DIRECTION_0..31 bit field macros, and
the GPIO_INTERRUPT_SETUP and GPIO_INTERRUPT_STATUS register macros
defined in ddk750_reg.h are not referenced anywhere in the driver. The
register addresses GPIO_DATA and GPIO_DATA_DIRECTION are kept as they
are still in use. Remove the rest to reduce dead code as noted in the
TODO file.
Signed-off-by: Gabriel Windlin <gawindlin@xxxxxxxxx>
---
drivers/staging/sm750fb/ddk750_reg.h | 96 ----------------------------
1 file changed, 96 deletions(-)
diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index 328254d3d7cc..d21e4a5e5ac4 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -215,104 +215,8 @@
#endif
#define GPIO_DATA 0x010000
-#define GPIO_DATA_31 BIT(31)
-#define GPIO_DATA_30 BIT(30)
-#define GPIO_DATA_29 BIT(29)
-#define GPIO_DATA_28 BIT(28)
-#define GPIO_DATA_27 BIT(27)
-#define GPIO_DATA_26 BIT(26)
-#define GPIO_DATA_25 BIT(25)
-#define GPIO_DATA_24 BIT(24)
-#define GPIO_DATA_23 BIT(23)
-#define GPIO_DATA_22 BIT(22)
-#define GPIO_DATA_21 BIT(21)
-#define GPIO_DATA_20 BIT(20)
-#define GPIO_DATA_19 BIT(19)
-#define GPIO_DATA_18 BIT(18)
-#define GPIO_DATA_17 BIT(17)
-#define GPIO_DATA_16 BIT(16)
-#define GPIO_DATA_15 BIT(15)
-#define GPIO_DATA_14 BIT(14)
-#define GPIO_DATA_13 BIT(13)
-#define GPIO_DATA_12 BIT(12)
-#define GPIO_DATA_11 BIT(11)
-#define GPIO_DATA_10 BIT(10)
-#define GPIO_DATA_9 BIT(9)
-#define GPIO_DATA_8 BIT(8)
-#define GPIO_DATA_7 BIT(7)
-#define GPIO_DATA_6 BIT(6)
-#define GPIO_DATA_5 BIT(5)
-#define GPIO_DATA_4 BIT(4)
-#define GPIO_DATA_3 BIT(3)
-#define GPIO_DATA_2 BIT(2)
-#define GPIO_DATA_1 BIT(1)
-#define GPIO_DATA_0 BIT(0)
#define GPIO_DATA_DIRECTION 0x010004
-#define GPIO_DATA_DIRECTION_31 BIT(31)
-#define GPIO_DATA_DIRECTION_30 BIT(30)
-#define GPIO_DATA_DIRECTION_29 BIT(29)
-#define GPIO_DATA_DIRECTION_28 BIT(28)
-#define GPIO_DATA_DIRECTION_27 BIT(27)
-#define GPIO_DATA_DIRECTION_26 BIT(26)
-#define GPIO_DATA_DIRECTION_25 BIT(25)
-#define GPIO_DATA_DIRECTION_24 BIT(24)
-#define GPIO_DATA_DIRECTION_23 BIT(23)
-#define GPIO_DATA_DIRECTION_22 BIT(22)
-#define GPIO_DATA_DIRECTION_21 BIT(21)
-#define GPIO_DATA_DIRECTION_20 BIT(20)
-#define GPIO_DATA_DIRECTION_19 BIT(19)
-#define GPIO_DATA_DIRECTION_18 BIT(18)
-#define GPIO_DATA_DIRECTION_17 BIT(17)
-#define GPIO_DATA_DIRECTION_16 BIT(16)
-#define GPIO_DATA_DIRECTION_15 BIT(15)
-#define GPIO_DATA_DIRECTION_14 BIT(14)
-#define GPIO_DATA_DIRECTION_13 BIT(13)
-#define GPIO_DATA_DIRECTION_12 BIT(12)
-#define GPIO_DATA_DIRECTION_11 BIT(11)
-#define GPIO_DATA_DIRECTION_10 BIT(10)
-#define GPIO_DATA_DIRECTION_9 BIT(9)
-#define GPIO_DATA_DIRECTION_8 BIT(8)
-#define GPIO_DATA_DIRECTION_7 BIT(7)
-#define GPIO_DATA_DIRECTION_6 BIT(6)
-#define GPIO_DATA_DIRECTION_5 BIT(5)
-#define GPIO_DATA_DIRECTION_4 BIT(4)
-#define GPIO_DATA_DIRECTION_3 BIT(3)
-#define GPIO_DATA_DIRECTION_2 BIT(2)
-#define GPIO_DATA_DIRECTION_1 BIT(1)
-#define GPIO_DATA_DIRECTION_0 BIT(0)
-
-#define GPIO_INTERRUPT_SETUP 0x010008
-#define GPIO_INTERRUPT_SETUP_TRIGGER_31 BIT(22)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_30 BIT(21)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_29 BIT(20)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_28 BIT(19)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_27 BIT(18)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_26 BIT(17)
-#define GPIO_INTERRUPT_SETUP_TRIGGER_25 BIT(16)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_31 BIT(14)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_30 BIT(13)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_29 BIT(12)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_28 BIT(11)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_27 BIT(10)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_26 BIT(9)
-#define GPIO_INTERRUPT_SETUP_ACTIVE_25 BIT(8)
-#define GPIO_INTERRUPT_SETUP_ENABLE_31 BIT(6)
-#define GPIO_INTERRUPT_SETUP_ENABLE_30 BIT(5)
-#define GPIO_INTERRUPT_SETUP_ENABLE_29 BIT(4)
-#define GPIO_INTERRUPT_SETUP_ENABLE_28 BIT(3)
-#define GPIO_INTERRUPT_SETUP_ENABLE_27 BIT(2)
-#define GPIO_INTERRUPT_SETUP_ENABLE_26 BIT(1)
-#define GPIO_INTERRUPT_SETUP_ENABLE_25 BIT(0)
-
-#define GPIO_INTERRUPT_STATUS 0x01000C
-#define GPIO_INTERRUPT_STATUS_31 BIT(22)
-#define GPIO_INTERRUPT_STATUS_30 BIT(21)
-#define GPIO_INTERRUPT_STATUS_29 BIT(20)
-#define GPIO_INTERRUPT_STATUS_28 BIT(19)
-#define GPIO_INTERRUPT_STATUS_27 BIT(18)
-#define GPIO_INTERRUPT_STATUS_26 BIT(17)
-#define GPIO_INTERRUPT_STATUS_25 BIT(16)
#define PANEL_DISPLAY_CTRL 0x080000
#define PANEL_DISPLAY_CTRL_RESERVED_MASK 0xc0f08000
--
2.53.0