Re: [PATCH v3 1/2] dt-bindings: phy: qcom: Add CSI2 C-PHY/DPHY schema

[Vijay Kumar Tumati]

On 3/3/2026 3:49 PM, Dmitry Baryshkov wrote:
> On Tue, Mar 03, 2026 at 03:24:16PM -0800, Vijay Kumar Tumati wrote:
> > On 3/3/2026 2:31 PM, Dmitry Baryshkov wrote:
> > > On Mon, Mar 02, 2026 at 05:51:24PM -0800, Vijay Kumar Tumati wrote:
> > > > Hi Bryan,
> > > >
> > > > On 2/26/2026 4:34 AM, Bryan O'Donoghue wrote:
> > > > > +        power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> > > > As we are cleaning up the PHY device nodes, we should consider fixing the
> > > > power domains as well. Although TOP GDSC is defined as a power domain, it is
> > > > not the power source for the PHY devices. Rather, it is the MMCX, MXC and
> > > > optionally MXA based on the architecture (Refer to 'Voltage rail' column for
> > > > PHY clocks in IPCAT). There is no
> > > > parent-child relationship between the TOP GDSC and these in the clock driver
> > > > and it was just working as the required power rails are getting enabled
> > > > by/for other MM devices.
> > >
> > > Which domains are required to access CSI PHY registers?
> > PHY register access requires the PHY core clock, cam_top_ahb clock. So in my
> > understanding, we need to trace these clocks in the topology backwards up
> > until at least the RCG, and all the voltage rails powering these clocks will
> > be the required power domains. Having said that, just register access works
> > even if the voltage rails are configured to the min level, which camcc does
> > already.
>
> Are they not gated by the GDSC?
All the Titan CAMCC clocks are gated by the TOP GDSC, yes.
> > > > > +
> > > > > +        vdda-0p8-supply = <&vreg_l2c_0p8>;
> > > > > +        vdda-1p2-supply = <&vreg_l1c_1p2>;
> > > > > +    };
> > > > > +
> > Thanks,
> > Vijay.
Thanks,
Vijay.