Re: [PATCH v3] PCI: dw-rockchip: Enable async probe by default

[Manivannan Sadhasivam]

On Thu, 26 Feb 2026 15:40:23 +0530, Anand Moon wrote:
> Rockchip DWC PCIe driver currently performs synchronous link training for
> combo PHYs (PCIe 3.0/2.0 and SATA 3.0) during boot. This process waits for
> the link to be fully established, adding several milliseconds to the boot
> sequence. To optimize boot time, this change enables asynchronous probing,
> allowing link establishment to proceed in the background while the kernel
> continues probing other devices.
> 
> [...]

Applied, thanks!

[1/1] PCI: dw-rockchip: Enable async probe by default
      commit: ec392abc95932838bf7e3d659d358f4df9ff5a0a

Best regards,
-- 
Manivannan Sadhasivam <mani@xxxxxxxxxx>