Re: [PATCH v4 6/6] riscv: dts: sophgo: dts nodes for i2s tdm modules

[Inochi Amaoto]

On Wed, Mar 04, 2026 at 09:57:56PM +0400, Anton D. Stavinskii wrote:
> On Thu, Feb 26, 2026 at 06:32:27AM +0400, Inochi Amaoto wrote:
> 
> > > +#define DMA_CPU_A53		0
> > > +#define DMA_CPU_C906_0	1
> > > +#define DMA_CPU_C906_1	2
> > > +
> > > +#endif // _SOPHGO_CV18XX_DMAMUX
> > > diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> > > index 06b0ce5a2db7..ebe5e8113939 100644
> > > --- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> > > +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi
> > > @@ -8,6 +8,7 @@
> > >  #include <dt-bindings/gpio/gpio.h>
> > >  #include <dt-bindings/interrupt-controller/irq.h>
> > >  #include "cv18xx-reset.h"
> > > +#include "cv180x-dmamux.h"
> > >  
> > >  / {
> > >  	#address-cells = <1>;
> > > @@ -448,6 +449,60 @@ usb: usb@4340000 {
> > >  			status = "disabled";
> > >  		};
> > >  
> > > +		i2s0: i2s@4100000 {
> > > +			compatible = "sophgo,cv1800b-i2s";
> > > +			reg = <0x04100000 0x1000>;
> > > +			clocks = <&clk CLK_APB_I2S0>, <&clk CLK_SDMA_AUD0>;
> > > +			clock-names = "i2s", "mclk";
> > > +			dmas = <&dmamux DMA_I2S0_RX 1>, <&dmamux DMA_I2S0_TX 1>;
> > > +			dma-names = "rx", "tx";
> > > +			status = "disabled";
> > > +		};
> > 
> > This magic number 1 is bind to the RISC-V cores, I think we should add a
> > macro DMA_CPU_ID into CPU file to route the CPU id to real cores.
> > Or, just let the borad dts configure which dma is enabled.
> 
> Hi, Inochi. Sorry for delay, I've missed the messages somehow. 
> I'm not sure what is the best option TBH. 
> If the problem is with the magic number, there are constants for this in your
> file:
> #define DMA_CPU_A53        0
> #define DMA_CPU_C906_0     1
> #define DMA_CPU_C906_1     2
> 
> So I could use them. 
> 
> If the problem with hardcoding the CPU - it is little bit more tricky. 
> Ths commit is in the riscv branch so we could not use ID 0 at all.
> Unless you want it to be more generic.
> From my understanding we could not boot from CPUID 2. (may be i'm wrong
> here) If it is correct, it means the whole setup will only work on CPU
> 1. 
> 

Yes, that's true, the only boot cores are 0 (A53) or 1 (C906_0).
And You only need to take care of these two cores. And the ARM
DTS you can just find it in the arch/arm64/boot/dts/sophgo.

Or, just let the board determine the DMA required, as the DMA
channel is shared across many devices. So it may be better to
not allocate them without enabling the device.

> In any case I will follow your suggestion. I agree, leaving this with 
> the magic number is not good. 
> 
> 
> Second question: 
> Do you want me to resubmit this change as A separate patch as the rest
> of this patch was applied? 
> 
> 

A separate patch or a new version with this single patch are both
fine to me. But you are always required to add the changelog and
link to the old versions. Otherwise, others are lost the information
about this.

Regards,
INochi