Re: Re: [PATCH v9 1/2] dt-bindings: phy: eswin: Document the EIC7700 SoC SATA PHY

[Min Lin]

Hi Bo Gan,

To make SATA, USB work, the HSP clock&reset driver is needed. We're doing the upstreaming for this driver.
Here is a draft for your reference, it has been verified with latest v15 clock patchset on our site:
[1]HSP clock and reset generator: https://github.com/eswincomputing/linux-next/pull/23
[2]SATA dts node example: https://github.com/eswincomputing/linux-next/pull/24

Regards,
Lin Min

> -----Original Messages-----
> From: "Bo Gan" <ganboing@xxxxxxxxx>
> Send time:Tuesday, 03/03/2026 19:46:25
> To: "Yulin Lu" <luyulin@xxxxxxxxxxxxxxxxxx>, vkoul@xxxxxxxxxx, neil.armstrong@xxxxxxxxxx, robh@xxxxxxxxxx, krzk+dt@xxxxxxxxxx, conor+dt@xxxxxxxxxx, p.zabel@xxxxxxxxxxxxxx, linux-phy@xxxxxxxxxxxxxxxxxxx, devicetree@xxxxxxxxxxxxxxx, linux-kernel@xxxxxxxxxxxxxxx
> Cc: ningyu@xxxxxxxxxxxxxxxxxx, linmin@xxxxxxxxxxxxxxxxxx, fenglin@xxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v9 1/2] dt-bindings: phy: eswin: Document the EIC7700 SoC SATA PHY
> 
> Hi Yulin,
> 
> Can your team share the dt and driver for &hspcrg? I want to do some
> testing with your latest v15 clock patchset on my P550 w/ SATA. W/o
> &hspcrg, the SATA phy can't be enabled, hence SATA drive doesn't work.
> 
> Bo
> 
> On 2/5/26 00:21, Yulin Lu wrote:
> > Document the SATA PHY on the EIC7700 SoC platform,
> > describing its usage.
> > 
> > Signed-off-by: Yulin Lu <luyulin@xxxxxxxxxxxxxxxxxx>
> > ---
> >   .../bindings/phy/eswin,eic7700-sata-phy.yaml  | 92 +++++++++++++++++++
> >   1 file changed, 92 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/phy/eswin,eic7700-sata-phy.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/phy/eswin,eic7700-sata-phy.yaml b/Documentation/devicetree/bindings/phy/eswin,eic7700-sata-phy.yaml
> > new file mode 100644
> > index 000000000000..fc7dbac77acf
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/eswin,eic7700-sata-phy.yaml
> > @@ -0,0 +1,92 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/eswin,eic7700-sata-phy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Eswin EIC7700 SoC SATA PHY
> > +
> > +maintainers:
> > +  - Yulin Lu <luyulin@xxxxxxxxxxxxxxxxxx>
> > +  - Huan He <hehuan1@xxxxxxxxxxxxxxxxxx>
> > +
> > +properties:
> > +  compatible:
> > +    const: eswin,eic7700-sata-phy
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  clock-names:
> > +    const: phy
> > +
> > +  resets:
> > +    maxItems: 2
> > +
> > +  reset-names:
> > +    items:
> > +      - const: port
> > +      - const: phy
> > +
> > +  eswin,tx-amplitude-tuning:
> > +    description: This adjusts the transmitter amplitude signal, and its value
> > +      is derived from eye diagram tuning. The three values correspond to Gen1,
> > +      Gen2, and Gen3 parameters respectively.
> > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > +    items:
> > +      - description: Gen1 parameter.
> > +        minimum: 0
> > +        maximum: 0x7f
> > +      - description: Gen2 parameter.
> > +        minimum: 0
> > +        maximum: 0x7f
> > +      - description: Gen3 parameter.
> > +        minimum: 0
> > +        maximum: 0x7f
> > +    default: [0, 0, 0]
> > +
> > +  eswin,tx-preemph-tuning:
> > +    description: This adjusts the transmitter de-emphasis signal, and its value
> > +      is derived from eye diagram tuning. The three values correspond to Gen1,
> > +      Gen2, and Gen3 parameters respectively.
> > +    $ref: /schemas/types.yaml#/definitions/uint32-array
> > +    items:
> > +      - description: Gen1 parameter.
> > +        minimum: 0
> > +        maximum: 0x3f
> > +      - description: Gen2 parameter.
> > +        minimum: 0
> > +        maximum: 0x3f
> > +      - description: Gen3 parameter.
> > +        minimum: 0
> > +        maximum: 0x3f
> > +    default: [0, 0, 0]
> > +
> > +  "#phy-cells":
> > +    const: 0
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - clocks
> > +  - clock-names
> > +  - resets
> > +  - reset-names
> > +  - "#phy-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    sata-phy@50440300 {
> > +        compatible = "eswin,eic7700-sata-phy";
> > +        reg = <0x50440300 0x40>;
> > +        clocks = <&hspcrg 17>;
> > +        clock-names = "phy";
> > +        resets = <&hspcrg 0>, <&hspcrg 1>;
> > +        reset-names = "port", "phy";
> > +        #phy-cells = <0>;
> > +    };