Re: [PATCH] ACPI: add a boot parameter to disable parsing CFMWS during NUMA init

[Haifeng Xu]

On 2026/3/5 01:16, Gregory Price wrote:
> On Wed, Mar 04, 2026 at 04:06:47PM +0800, Haifeng Xu wrote:
>> For the machine Intel(R) Xeon(R) 6746E that supports CXL memory,
>> the possible nodes are 20 (0-19). However, only two numa nodes (0-1)
>> have memory and the rest nodes (2-19) detected by CEDT are memoryless.
>>
>> The problems is that when creating many pods, the shrinker map size
>> needs to be expanded for all memory cgroups in expand_shrinker_info().
>> If the number of possible nodes is too large, the holding time of
>> shrinker lock grows significantly.
>>
>> In this case, there is no CXL memory inserted in the machine, those
>> memoryless nodes are useless for us, so there is no need to set them
>> in 'numa_nodes_parsed'. After disabling parsing CFMWS, the pod creation
>> time is reduced from over 10 minutes to approximately 150 seconds in
>> our internal test.
>>
> 
> This seems like the wrong scope to fix the underlying problem - which is
> the shrinker lock holding scope.

Hi Gregory，
	
Thanks for your comments. 

Every memcg records shrinker info for each possible node. If we use online node
instead of possible node，then during memory hotplug, we must tarverse all memcgs
and shrinkers to check whether corresponding node has allocated the shrinker_info.
This way introduces more complexity.


> 
> If you're not actually using CXL, can't you just disable CXL in the
> BIOS?  Then you shouldn't even emit CFMWS at all.

I have asked our Intel Support Engineer, he saied that cxl can't be disabled
in BIOS.

If know how much nodes we actually use, can we specify the max number of pxm?

Now the pxm can't exceed MAX_PXM_DOMAINS which is equal to MAX_NUMNODES.

Thanks!

> 
> ~Gregory