Re: [PATCH v4 2/3] clk: qcom: Add a driver for SM8750 GPU clocks

[Taniya Das]

On 3/4/2026 7:54 AM, Dmitry Baryshkov wrote:
>> +		.ops = &clk_alpha_pll_postdiv_taycan_elu_ops,
>> +	},
>> +};
>> +
>> +static const struct parent_map gpu_cc_parent_map_1[] = {
>> +	{ P_BI_TCXO, 0 },
>> +	{ P_GPU_CC_PLL0_OUT_MAIN, 1 },
>> +	{ P_GPU_CC_PLL0_OUT_EVEN, 2 },
>> +	{ P_GPU_CC_PLL0_OUT_ODD, 3 },
>> +	{ P_GPLL0_OUT_MAIN, 5 },
>> +	{ P_GPLL0_OUT_MAIN_DIV, 6 },
>> +};
>> +
>> +static const struct clk_parent_data gpu_cc_parent_data_1[] = {
>> +	{ .fw_name = "bi_tcxo" },
> Why is this clock using fw_names instead of indices?

I will fix in the next patch.

> 
>> +	{ .hw = &gpu_cc_pll0.clkr.hw },
>> +	{ .hw = &gpu_cc_pll0_out_even.clkr.hw },
>> +	{ .hw = &gpu_cc_pll0.clkr.hw },
>> +	{ .fw_name = "gpll0_out_main" },
>> +	{ .fw_name = "gpll0_out_main_div" },

-- 
Thanks,
Taniya Das