Re: [PATCH v7 2/9] PCI: tegra194: Calibrate P2U for Endpoint mode

From: Manivannan Sadhasivam

Date: Thu Mar 05 2026 - 05:59:38 EST


On Tue, Mar 03, 2026 at 12:27:51PM +0530, Manikanta Maddireddy wrote:
> From: Vidya Sagar <vidyas@xxxxxxxxxx>
>
> Calibrate P2U for Endpoint controller to request UPHY PLL rate change to

What is P2U?

- Mani

> Gen1 during initialization. This helps to reset stale PLL state from the
> previous bad link state.
>
> Reviewed-by: Jon Hunter <jonathanh@xxxxxxxxxx>
> Tested-by: Jon Hunter <jonathanh@xxxxxxxxxx>
> Signed-off-by: Vidya Sagar <vidyas@xxxxxxxxxx>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@xxxxxxxxxx>
> ---
> Changes V1 -> V7: None
>
> drivers/pci/controller/dwc/pcie-tegra194.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index 2f1f882fc737..980988b7499c 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1054,6 +1054,9 @@ static int tegra_pcie_enable_phy(struct tegra_pcie_dw *pcie)
> ret = phy_power_on(pcie->phys[i]);
> if (ret < 0)
> goto phy_exit;
> +
> + if (pcie->of_data->mode == DW_PCIE_EP_TYPE)
> + phy_calibrate(pcie->phys[i]);
> }
>
> return 0;
> --
> 2.34.1
>

--
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