[PATCH] KVM: x86: Add LAPIC guard in kvm_apic_write_nodecode()

From: xuanqingshi

Date: Thu Mar 05 2026 - 06:13:27 EST


kvm_apic_write_nodecode() dereferences vcpu->arch.apic without first
checking whether the in-kernel LAPIC has been initialized. If it has
not (e.g. the vCPU was created without an in-kernel LAPIC), the
dereference results in a NULL pointer access.

While APIC-write VM-Exits are not expected to occur on a vCPU without
an in-kernel LAPIC, kvm_apic_write_nodecode() should be robust against
such a scenario as a defense-in-depth measure, e.g. to guard against
KVM bugs or CPU errata that could generate a spurious APIC-write
VM-Exit.

Add a WARN_ON_ONCE() guard and bail early if vcpu->arch.apic is NULL.

Found by a VMCS-targeted fuzzer based on syzkaller.

Signed-off-by: xuanqingshi <1356292400@xxxxxx>
---
arch/x86/kvm/lapic.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 9381c58d4c85..0f9d314dfa2a 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2657,6 +2657,9 @@ void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset)
{
struct kvm_lapic *apic = vcpu->arch.apic;

+ if (WARN_ON_ONCE(!apic))
+ return;
+
/*
* ICR is a single 64-bit register when x2APIC is enabled, all others
* registers hold 32-bit values. For legacy xAPIC, ICR writes need to
--
2.25.1