RE: [PATCH v3 07/10] arm64: dts: renesas: Add initial DTSI for RZ/G3L SoC

[Biju Das]

Hi Geert,

Thanks for the feedback.

> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: 05 March 2026 14:54
> Subject: Re: [PATCH v3 07/10] arm64: dts: renesas: Add initial DTSI for RZ/G3L SoC
> 
> Hi Biju,
> 
> On Tue, 3 Feb 2026 at 11:30, Biju <biju.das.au@xxxxxxxxx> wrote:
> > From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> >
> > Add the initial DTSI for the RZ/G3L SoC.
> > The files in this commit have the following meaning:
> >   - r9a08g046.dtsi:    RZ/G3L family SoC common parts
> >   - r9a08g046l48.dtsi: RZ/G3L R0A08G046L{46,48} SoC specific parts
> >
> > Added place holders to reuse the code for Renesas SMARC II carrier
> > board.
> >
> > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> 
> Thanks for your patch!
> 
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
> > @@ -0,0 +1,251 @@
> > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +/*
> > + * Device Tree Source for the RZ/G3L SoC
> > + *
> > + * Copyright (C) 2026 Renesas Electronics Corp.
> > + */
> > +
> > +#include <dt-bindings/clock/r9a08g046-cpg.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > +       compatible = "renesas,r9a08g046";
> > +       #address-cells = <2>;
> > +       #size-cells = <2>;
> > +       interrupt-parent = <&gic>;
> > +
> > +       audio_clk1: audio-clk1 {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by boards that provide it. */
> > +               clock-frequency = <0>;
> > +       };
> > +
> > +       audio_clk2: audio-clk2 {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by boards that provide it. */
> > +               clock-frequency = <0>;
> > +       };
> > +
> > +       can_clk: can-clk {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by boards that provide it. */
> > +               clock-frequency = <0>;
> > +       };
> 
> These three are unused, so please drop them.

Agreed.

> 
> [...]
> 
> > +       eth0_txc_tx_clk: eth0-txc-tx-clk {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by the board */
> > +               clock-frequency = <0>;
> > +       };
> > +
> > +       eth0_rxc_rx_clk: eth0-rxc-rx-clk {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by the board */
> > +               clock-frequency = <0>;
> > +       };
> > +
> > +       eth1_txc_tx_clk: eth1-txc-tx-clk {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by the board */
> > +               clock-frequency = <0>;
> > +       };
> > +
> > +       eth1_rxc_rx_clk: eth1-rxc-rx-clk {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by the board */
> > +               clock-frequency = <0>;
> > +       };
> 
> TBD...
OK.

> 
> > +
> > +       extal_clk: extal-clk {
> > +               compatible = "fixed-clock";
> > +               #clock-cells = <0>;
> > +               /* This value must be overridden by the board. */
> > +               clock-frequency = <0>;
> > +       };
> > +
> > +       psci {
> > +               compatible = "arm,psci-1.0", "arm,psci-0.2";
> > +               method = "smc";
> > +       };
> > +
> > +       soc: soc {
> 
> > +               i2c0: i2c@100ae000 {
> > +                       #address-cells = <1>;
> > +                       #size-cells = <0>;
> 
> Please move these two below "reg".

OK.

> 
> > +                       reg = <0 0x100AE000 0 0x400>;
> 
> Please use lower-case hexadecimal.

OK.

> 
> > +                       /* placeholder */
> > +               };
> 
> > +               pinctrl: pinctrl@11030000 {
> > +                       reg = <0 0x11030000 0 0x10000>;
> > +                       gpio-controller;
> > +                       #gpio-cells = <2>;
> 
> /* placeholder */

OK.

> 
> > +               };
> > +
> > +               dmac: dma-controller@11820000 {
> 
> Unused. Surely you can wire up scif0?

Yes, but I don't get login prompt, as SCIF0 interrupts have dependency on
DMA reset/clocks to route the interrupts to CPU.

Cheers,
Biju