Re: [PATCH 1/4] dt-bindings: iio: adc: add bindings for AD4691 family

[Jonathan Cameron]

On Thu, 05 Mar 2026 14:23:27 +0200
Radu Sabau via B4 Relay <devnull+radu.sabau.analog.com@xxxxxxxxxx> wrote:

> From: Radu Sabau <radu.sabau@xxxxxxxxxx>
> 
> Add YAML bindings and dt-bindings header for the Analog Devices AD4691
> family of multichannel SAR ADCs (AD4691, AD4692, AD4693, AD4694).
> 
> The binding describes five operating modes selectable via the
> adi,spi-mode property, optional PWM/clock for CNV Clock and CNV Burst
> modes, GPIO pins, voltage supplies and the trigger-source interface for
> SPI Engine offload operation.
> 
> Signed-off-by: Radu Sabau <radu.sabau@xxxxxxxxxx>

Hi Radu, I'm going to focus on mode... Mostly because things called
mode are usually a sign of mixing up different aspects of the board
design...


> +
> +  adi,spi-mode:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [0, 1, 2, 3, 4]
> +    description: |
> +      Selects the ADC operating mode:
> +        0 - CNV Clock Mode: External PWM drives CNV pin, samples at PWM rate.
> +        1 - CNV Burst Mode: PWM triggers burst cycles, internal oscillator
> +            drives conversions within each burst.
> +        2 - Autonomous Mode: Internal oscillator drives conversions, software
> +            starts/stops via register write.
> +        3 - SPI Burst Mode: Similar to Autonomous Mode but optimized for
> +            SPI burst reads.
> +        4 - Manual Mode: CNV is directly tied to SPI CS. Each SPI transfer
> +            triggers a conversion and returns previous result (pipelined).
Which of these are wiring related?

0 and 1 need a PWM wired up.  So describe a PWM. If there is one we need
to figure which we want so indication provided by userspace.

2 and 3 don't need anything beyond bus.

4 probably does need a binding but that's about whether that wire connection
is there or not.

> +
> +  vio-supply:
> +    description: I/O voltage supply (1.71V to 1.89V or VDD).
> +
> +  vref-supply:
> +    description:
> +      External reference voltage supply (2.4V to 5.25V). Mutually exclusive
> +      with vrefin-supply.

Enforce that via a rule as you do below. No need to document it here as well.

> +
> +  vrefin-supply:
> +    description:
> +      Internal reference buffer input supply. Mutually exclusive with
> +      vref-supply.


> +
> +  # AD4694 (20-bit) does not support Manual Mode

That's a driver thing. Not something we want in the binding.

> +  - if:
> +      properties:
> +        compatible:
> +          const: adi,ad4694
> +    then:
> +      properties:
> +        adi,spi-mode:
> +          enum: [0, 1, 2, 3]
> +
> +  # CNV Clock Mode and CNV Burst Mode require PWM and clock
> +  - if:
> +      properties:
> +        adi,spi-mode:
> +          enum: [0, 1]

This is backwards. Define these as optional properties and use that to
limit what the driver can offer as ways it can run. Maybe they
only make sense together in which case add that rule.


> +    then:
> +      required:
> +        - clocks
> +        - clock-names
> +        - pwms
> +        - pwm-names
> +
> +  # Non-Manual modes (0-3) without SPI offload require a DRDY interrupt.
> +  # Offload configurations expose '#trigger-source-cells' instead.
> +  - if:
> +      properties:
> +        adi,spi-mode:
> +          enum: [0, 1, 2, 3]
> +      not:
> +        required:
> +          - '#trigger-source-cells'
> +    then:
> +      required:
> +        - interrupts
> +        - interrupt-names
> +
>