Re: [PATCH v2 RESEND 1/1] PCI: pcie_bus_config can be set at build time

[Florian Fainelli]

On 3/5/26 13:36, Jim Quinlan wrote:
> On Mon, Mar 2, 2026 at 7:03 PM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote:
> > On Tue, Feb 24, 2026 at 04:10:17PM -0500, Jim Quinlan wrote:
> > > On Fri, Feb 20, 2026 at 5:11 PM Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote:
> > > > On Mon, Sep 28, 2020 at 03:46:51PM -0400, Jim Quinlan wrote:
> > > > > The Kconfig is modified so that the pcie_bus_config setting can be done at
> > > > > build time in the same manner as the CONFIG_PCIEASPM_XXXX choice.  The
> > > > > pci_bus_config setting may still be overridden by the bootline param.
> > > > >
> > > > > Signed-off-by: Jim Quinlan <james.quinlan@xxxxxxxxxxxx>
> > > >
> > > > We merged this as b0e85c3c8554 ("PCI: Add Kconfig options for MPS/MRRS
> > > > strategy"), which appeared in v5.10.
> > > >
> > > > In retrospect, I think this might have been a mistake because it
> > > > forces a build-time configuration for something that may not be known
> > > > at build time and can be set via command-line parameter.
> > > ...
> >
> > > > But I can't find any discussion about it.  Did you have a use case
> > > > where command line parameters weren't usable?
> > >
> > > Yes.  We have a Cable Modem (CM) customer who can update their Linux
> > > version but cannot update their boot loader or its default bootline.
> > > FWIW, they only want the option to set pcie_bus_config to
> > > PCIE_BUS_SAFE via the .config.
> > > ...
> >
> > > It's a CM product which uses a particular Wifi chip.  Recognizing this
> > > scenario would have the RC trying to grab the EP's vendor-id (and
> > > possibly more info), and that seems awkward at best.
> >
> > This is actually kind of weird.  I don't know why a particular device
> > would have any special MPS or MRRS requirements.
> >
> > Do you have any more details about this?  Does the WiFi chip actually
> > not *work* with other MPS settings?  Or is this a performance thing
> > where other settings don't give acceptable performance?
>
> Hi Bjorn,
> I looked up the original request mail thread on this -- it appears
> that the device defaulted to an MPS value of 128, and that value is
> what it was assigned. Unfortunately, this device has an occasional  HW
> bug when MPS=128.  Rather than fix the HW bug, they wanted a SW change
> in Linux,  and somehow that request morphed into a request for
> PCIE_BUS_XXX config settings.  So the reason for the original
> submission is weak and we should have done something different, but
> here we are.

Late to the party and probably could have suggested back then, but this 
seems like a prime candidate for using a PCI quirk fixup?
--
Florian