答复: [外部邮件] Re: [PATCH] x86/mce: Fix timer interval adjustment after logging a MCE event

[Li,Rongqing(ACG CCN)]

> Well, what about CMCI? AMD has similar interrupt types. Those handlers end up
> in the same path of machine_check_poll() and the above scenario can happen,
> AFAICT.
> 
> > I don't think we care. If we miss out halving the interval becuause an
> > error was logged between timer based polling, nothing really bad will
> > happen. The interval might get sorted out on the next interval.
> 
> Right, that's what I'm thinking too.
> 
> > Unless someone has a real world case where something is going badly
> > wrong, then I don't think any changes are needed to cover this race.
> 
> Ok, let's try the simple thing first.
> 
> Thx.

Is there any progress on this?

Thx

[Li,Rongqing] 


> 
> --
> Regards/Gruss,
>     Boris.
> 
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