[PATCH 22/24] soc: qcom: ubwc: use fixed values for UBWC swizzle for UBWC < 4.0
From: Dmitry Baryshkov
Date: Fri Mar 06 2026 - 11:53:39 EST
UBWC devices before 4.0 use standard UBWC swizzle levels. As all the
drivers now use the qcom_ubwc_swizzle() helper, move those values to the
helper, leaving UBWC 4.0+ intact for now.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
---
drivers/soc/qcom/ubwc_config.c | 34 ----------------------------------
include/linux/soc/qcom/ubwc.h | 33 ++++++++++++++++++++++++---------
2 files changed, 24 insertions(+), 43 deletions(-)
diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c
index 51de36f5f40b..49edfabb5e18 100644
--- a/drivers/soc/qcom/ubwc_config.c
+++ b/drivers/soc/qcom/ubwc_config.c
@@ -25,17 +25,11 @@ static const struct qcom_ubwc_cfg_data kaanapali_data = {
static const struct qcom_ubwc_cfg_data msm8937_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
- UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data msm8998_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
- UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
};
@@ -52,94 +46,66 @@ static const struct qcom_ubwc_cfg_data sa8775p_data = {
static const struct qcom_ubwc_cfg_data sar2130p_data = {
.ubwc_enc_version = UBWC_3_1,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 13,
};
static const struct qcom_ubwc_cfg_data sc7180_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sc7280_data = {
.ubwc_enc_version = UBWC_3_1,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sc8180x_data = {
.ubwc_enc_version = UBWC_3_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
};
static const struct qcom_ubwc_cfg_data sc8280xp_data = {
.ubwc_enc_version = UBWC_4_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 16,
};
static const struct qcom_ubwc_cfg_data sdm670_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sdm845_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
};
static const struct qcom_ubwc_cfg_data sm6115_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
- UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm6125_data = {
.ubwc_enc_version = UBWC_1_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL1 |
- UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm6150_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm6350_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm7150_data = {
.ubwc_enc_version = UBWC_2_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 14,
};
static const struct qcom_ubwc_cfg_data sm8150_data = {
.ubwc_enc_version = UBWC_3_0,
- .ubwc_swizzle = UBWC_SWIZZLE_ENABLE_LVL2 |
- UBWC_SWIZZLE_ENABLE_LVL3,
.highest_bank_bit = 15,
};
diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
index d4a0cfb133fa..0cbd20078ada 100644
--- a/include/linux/soc/qcom/ubwc.h
+++ b/include/linux/soc/qcom/ubwc.h
@@ -22,9 +22,6 @@ struct qcom_ubwc_cfg_data {
* UBWC 4.0 adds the optional ability to disable levels 2 & 3.
*/
u32 ubwc_swizzle;
-#define UBWC_SWIZZLE_ENABLE_LVL1 BIT(0)
-#define UBWC_SWIZZLE_ENABLE_LVL2 BIT(1)
-#define UBWC_SWIZZLE_ENABLE_LVL3 BIT(2)
/**
* @highest_bank_bit: Highest Bank Bit
@@ -55,12 +52,7 @@ static inline const struct qcom_ubwc_cfg_data *qcom_ubwc_config_get_data(void)
static inline bool qcom_ubwc_get_ubwc_mode(const struct qcom_ubwc_cfg_data *cfg)
{
- bool ret = cfg->ubwc_enc_version == UBWC_1_0;
-
- if (ret && !(cfg->ubwc_swizzle & UBWC_SWIZZLE_ENABLE_LVL1))
- pr_err("UBWC config discrepancy - level 1 swizzling disabled on UBWC 1.0\n");
-
- return ret;
+ return cfg->ubwc_enc_version == UBWC_1_0;
}
/*
@@ -88,8 +80,31 @@ static inline bool qcom_ubwc_bank_spread(const struct qcom_ubwc_cfg_data *cfg)
return true;
}
+#define UBWC_SWIZZLE_ENABLE_LVL1 BIT(0)
+#define UBWC_SWIZZLE_ENABLE_LVL2 BIT(1)
+#define UBWC_SWIZZLE_ENABLE_LVL3 BIT(2)
+
+/**
+ * @qcom_ubwc_swizzle: Whether to enable level 1, 2 & 3 bank swizzling.
+ *
+ * UBWC 1.0 always enables all three levels.
+ * UBWC 2.0 removes level 1 bank swizzling, leaving levels 2 & 3.
+ * UBWC 4.0 adds the optional ability to disable levels 2 & 3.
+ */
static inline u32 qcom_ubwc_swizzle(const struct qcom_ubwc_cfg_data *cfg)
{
+ if (cfg->ubwc_enc_version == 0)
+ return 0;
+
+ if (cfg->ubwc_enc_version == UBWC_1_0)
+ return UBWC_SWIZZLE_ENABLE_LVL1 |
+ UBWC_SWIZZLE_ENABLE_LVL2 |
+ UBWC_SWIZZLE_ENABLE_LVL3;
+
+ if (cfg->ubwc_enc_version < UBWC_4_0)
+ return UBWC_SWIZZLE_ENABLE_LVL2 |
+ UBWC_SWIZZLE_ENABLE_LVL3;
+
return cfg->ubwc_swizzle;
}
--
2.47.3