Re: [PATCH v3 2/5] pinctrl: samsung: fix incorrect pin-bank entries on Exynos2200/7885/8890/8895

[Peter Griffin]

Hi Youngmin,

On Tue, 2 Dec 2025 at 09:30, Youngmin Nam <youngmin.nam@xxxxxxxxxxx> wrote:
>
> This patch corrects wrong pin bank table definitions for 4 SoCs based on
> their TRMs.
>
> Exynos2200
> - gpq0/1/2 were using EXYNOS_PIN_BANK_EINTN(), which implies a
>   'bank_type_off' layout (.fld_width = {4,1,2,2,2,2}).
> - Per the SoC TRM these banks must use the 'alive' layout
>   (.fld_width = {4,1,4,4}).
> - Switch them to EXYNOS9_PIN_BANK_EINTN(exynos9_bank_type_alive, ...).
>
> Exynos7885
> - etc0, etc1: update bank type to match the SoC TRM.
> - gpq0 is a non-wakeup interrupt bank; change EINTW -> EINTN accordingly.
>
> Exynos8890
> - Per the SoC TRM, rename bank ect0 to gpb3 and mark it as
>   a non-external interrupt bank.
> - gpi1, gpi2: update bank type to match the SoC TRM.
>   exynos8895_bank_type_off (.fld_width = {4,1,2,3,2,2}) ->
>   exynos5433_bank_type_off (.fld_width = {4,1,2,4,2,2})
> - Per the SoC TRM, mark etc1 as a non-external interrupt bank.
> - apply lower case style for hex numbers.
>
> Exynos8895
> - gpa4 is a non-wakeup interrupt bank per the SoC TRM.
>   change EINTW -> EINTN. (The bank_type itself was correct and is kept
>   unchanged.)
> - apply lower case style for hex numbers.
>
> This aligns the pin-bank tables with the documented bitfield layouts and
> wakeup domains. No DT/ABI change.
>
> Signed-off-by: Youngmin Nam <youngmin.nam@xxxxxxxxxxx>
> Reviewed-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> Reviewed-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@xxxxxxxxx>
> Tested-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> ---

This patch contains some worthwhile fixes for multiple Exynos SoCs. Do
you plan to re-send it? I think it would be good to get this merged
(even if there isn't broad agreement around renaming the pinctrl
macros to EXYNOS9_)

Thanks,

Peter