Re: [PATCH RFT v3 2/3] arm64: dts: qcom: glymur: Add USB related nodes

[Abel Vesa]

On 26-03-03 23:50:39, Akhil P Oommen wrote:
> << Snip >>
> 
> > +
> > +		usb_hs: usb@a2f8800 {
> > +			compatible = "qcom,glymur-dwc3", "qcom,snps-dwc3";
> > +			reg = <0x0 0x0a200000 0x0 0xfc100>;
> > +
> > +			clocks = <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>,
> > +				 <&gcc GCC_USB20_MASTER_CLK>,
> > +				 <&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>,
> > +				 <&gcc GCC_USB20_SLEEP_CLK>,
> > +				 <&gcc GCC_USB20_MOCK_UTMI_CLK>,
> > +				 <&gcc GCC_CFG_NOC_USB_ANOC_AHB_CLK>,
> > +				 <&gcc GCC_CFG_NOC_USB_ANOC_SOUTH_AHB_CLK>;
> > +			clock-names = "cfg_noc",
> > +				      "core",
> > +				      "iface",
> > +				      "sleep",
> > +				      "mock_utmi",
> > +				      "noc_aggr_north",
> > +				      "noc_aggr_south";
> > +
> > +			assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
> > +					  <&gcc GCC_USB20_MASTER_CLK>;
> > +			assigned-clock-rates = <19200000>, <200000000>;
> > +
> > +			interrupts-extended = <&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
> > +					      <&intc GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
> > +					      <&pdc 92 IRQ_TYPE_EDGE_BOTH>,
> > +					      <&pdc 57 IRQ_TYPE_EDGE_BOTH>,
> > +					      <&intc GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
> > +			interrupt-names = "dwc_usb3",
> > +					  "pwr_event",
> > +					  "dp_hs_phy_irq",
> > +					  "dm_hs_phy_irq",
> > +					  "hs_phy_irq";
> > +
> > +			resets = <&gcc GCC_USB20_PRIM_BCR>;
> > +
> > +			power-domains = <&gcc GCC_USB20_PRIM_GDSC>;
> > +			required-opps = <&rpmhpd_opp_nom>;
> 
> Please ensure that the rail (CX rail?) is scaled. Otherwise, it will
> impact other subsystems using the same rail (eg: GPU).

Sent as a separate fix here:

https://lore.kernel.org/all/20260309-glymur-fix-gcc-cx-scaling-v1-0-f682c82f116f@xxxxxxxxxxxxxxxx/