[PATCH v2 1/3] dt-bindings: clock: qcom: glymur-gcc: Add missing CX power domain

From: Abel Vesa

Date: Mon Mar 09 2026 - 08:16:18 EST


It has been concluded off-list that the Global Clock Controller needs to
scale the RPMh CX power domain, otherwise some of the subsystems might
crash or be unstable. So adding the RPMh CX power domain to the clock
controller which will result in all GDSCs being parented by CX. This way,
the vote from the consumers of each GDSC will trickle all the way to CX.

So document the power domain.

Fixes: ee2d967030fe ("dt-bindings: clock: qcom: document the Glymur Global Clock Controller")
Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml | 8 ++++++++
1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml
index b05b0e6c4483..7a4054c9f215 100644
--- a/Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,glymur-gcc.yaml
@@ -65,9 +65,15 @@ properties:
- description: USB4 PHY 2 pcie pipe clock source
- description: USB4 PHY 2 Max pipe clock source

+ power-domains:
+ description:
+ A phandle and PM domain specifier for the CX power domain.
+ maxItems: 1
+
required:
- compatible
- clocks
+ - power-domains
- '#power-domain-cells'

allOf:
@@ -78,6 +84,7 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
clock-controller@100000 {
compatible = "qcom,glymur-gcc";
reg = <0x100000 0x1f9000>;
@@ -113,6 +120,7 @@ examples:
<&usb4_phy_0_pcie_pipe>, <&usb4_phy_0_max_pipe>,
<&usb4_phy_1_pcie_pipe>, <&usb4_phy_1_max_pipe>,
<&usb4_phy_2_pcie_pipe>, <&usb4_phy_2_max_pipe>;
+ power-domains = <&rpmhpd RPMHPD_CX>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;

--
2.48.1