Re: [PATCH 1/4] arm64: dts: ti: k3-j721s2-main: Add mmio-sram node to main_navss

[Brandon Brnich]

Hi Vignesh,

On 3/9/26 02:27, Vignesh Raghavendra wrote:
> On 02/03/26 23:47, Brandon Brnich wrote:
> > The NavigatorSS (NAVSS) address space contains a 64 KiB on-chip SRAM
> > region at its base address. Add an mmio-sram node to expose this region
> > to consumers via the generic SRAM allocator API.
> >
> > Signed-off-by: Brandon Brnich <b-brnich@xxxxxx>
> > ---
> >   arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 8 ++++++++
> >   1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > index 80c51b11ac9f..7b1ba34ab719 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> > @@ -785,6 +785,14 @@ main_navss: bus@30000000 {
> >   		dma-coherent;
> >   		dma-ranges;
> >   
> > +		main_navss_sram: navss-sram@30000000 {
>
> This fails make dtbs_check

I ran kpv but must be having configuration issues because all of these 
cases passed. I will fixup the node and send a v2 shortly.

Best,
Brandon

> > +			compatible = "mmio-sram";
> > +			reg = <0x00 0x30000000 0x00 0x10000>;
> > +			#address-cells = <1>;
> > +			#size-cells = <1>;
> > +			ranges = <0x0 0x00 0x30000000 0x10000>;
> > +		};
> > +
> >   		main_navss_intr: interrupt-controller@310e0000 {
> >   			compatible = "ti,sci-intr";
> >   			reg = <0x00 0x310e0000 0x00 0x4000>;