Re: [PATCH] arm64: dts: qcom: kodiak: Fix PCIe1 PHY ref clock voting

[Bjorn Andersson]

On Fri, 23 Jan 2026 17:42:27 +0530, Krishna Chaitanya Chundru wrote:
> GCC_PCIE_CLKREF_EN controls a repeater that provides the reference clock
> only to the PCIe0 PHY. PCIe1 PHY receives its refclk directly from the CXO
> source.
> 
> If the PCIe1 driver in HLOS votes for or against GCC_PCIE_CLKREF_EN, it
> will inadvertently modify the refclk to PCIe0 as well. Since PCIe0 is
> managed by WPSS while PCIe1 is managed in HLOS, there is no mechanism to
> coordinate these votes. As a result, HLOS may disable this repeater
> during suspend and cut off the PCIe0 PHY refclk while PCIe0 is still
> active.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: kodiak: Fix PCIe1 PHY ref clock voting
      commit: 30e8b6d42e8988eaaf0c2efd8c3797cb3884faea

Best regards,
-- 
Bjorn Andersson <andersson@xxxxxxxxxx>