Re: [PATCH v2 3/5] media: iris: Add IRIS_BSE_HW_CLK handling in vpu3 power on/off sequence

From: Wangao Wang

Date: Tue Mar 10 2026 - 03:14:51 EST




On 2026/3/10 7:58, Dmitry Baryshkov wrote:
On Fri, Mar 06, 2026 at 04:44:31PM +0800, Wangao Wang wrote:
On X1P42100 the Iris block has an extra BSE clock. Wire this clock into
the power on/off sequence.

The BSE clock is used to drive the Bin Stream Engine, which is a sub-block
of the video codec hardware responsible for bitstream-level processing. It
is required to be enabled separately from the core clock to ensure proper
codec operation.

As far as I can see, Purwa is a one-off. Why are we forcing support for
the platform (and for the BSE clock) into the generic code?



So should I add a dedicated power on/off API for Purwa, and name it something like iris_vpu31_power_on_hw() / iris_vpu31_power_off_hw()?

--
Best Regards,
Wangao