Re: [PATCH v1 2/4] ASoC: qcom: qdsp6: q6prm: add the missing LPASS MCLK clock IDs

[Mohammad Rafi Shaik]

On 3/9/2026 7:37 PM, Srinivas Kandagatla wrote:
> On 3/9/26 11:12 AM, Mohammad Rafi Shaik wrote:
> > Add the missing LPASS MCLK ids for the q6prm ADSP.
> >
> > Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxxxxxxxx>
> > Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@xxxxxxxxxxxxxxxx>
> > ---
>
>
> This patch has already been submitted previously by Neil, Please pick
> the patch from https://lkml.org/lkml/2025/10/6/828

ACK,

sure will pick Neil patch and replace with current patch.

Best Regards,
Rafi.

> --srini
> >   sound/soc/qcom/qdsp6/q6prm-clocks.c |  5 +++++
> >   sound/soc/qcom/qdsp6/q6prm.h        | 11 +++++++++++
> >   2 files changed, 16 insertions(+)
> >
> > diff --git a/sound/soc/qcom/qdsp6/q6prm-clocks.c b/sound/soc/qcom/qdsp6/q6prm-clocks.c
> > index 4c574b48a..51b131fa9 100644
> > --- a/sound/soc/qcom/qdsp6/q6prm-clocks.c
> > +++ b/sound/soc/qcom/qdsp6/q6prm-clocks.c
> > @@ -42,6 +42,11 @@ static const struct q6dsp_clk_init q6prm_clks[] = {
> >   	Q6PRM_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT),
> >   	Q6PRM_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT),
> >   	Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_OSR),
> > +	Q6PRM_CLK(LPASS_CLK_ID_MCLK_1),
> > +	Q6PRM_CLK(LPASS_CLK_ID_MCLK_2),
> > +	Q6PRM_CLK(LPASS_CLK_ID_MCLK_3),
> > +	Q6PRM_CLK(LPASS_CLK_ID_MCLK_4),
> > +	Q6PRM_CLK(LPASS_CLK_ID_MCLK_5),
> >   	Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
> >   	Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
> >   	Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
> > diff --git a/sound/soc/qcom/qdsp6/q6prm.h b/sound/soc/qcom/qdsp6/q6prm.h
> > index a988a3208..8296370e3 100644
> > --- a/sound/soc/qcom/qdsp6/q6prm.h
> > +++ b/sound/soc/qcom/qdsp6/q6prm.h
> > @@ -52,6 +52,17 @@
> >   /* Clock ID for QUINARY MI2S OSR CLK  */
> >   #define Q6PRM_LPASS_CLK_ID_QUI_MI2S_OSR                         0x116
> >   
> > +/* Clock ID for MCLK1 */
> > +#define Q6PRM_LPASS_CLK_ID_MCLK_1				0x300
> > +/* Clock ID for MCLK2 */
> > +#define Q6PRM_LPASS_CLK_ID_MCLK_2				0x301
> > +/* Clock ID for MCLK3 */
> > +#define Q6PRM_LPASS_CLK_ID_MCLK_3				0x302
> > +/* Clock ID for MCLK4 */
> > +#define Q6PRM_LPASS_CLK_ID_MCLK_4				0x303
> > +/* Clock ID for MCLK5 */
> > +#define Q6PRM_LPASS_CLK_ID_MCLK_5				0x304
> > +
> >   #define Q6PRM_LPASS_CLK_ID_WSA_CORE_MCLK			0x305
> >   #define Q6PRM_LPASS_CLK_ID_WSA_CORE_NPL_MCLK			0x306
> >