Re: [PATCH 2/3] dma-mapping: Clarify valid conditions for CPU cache line overlap

From: Marek Szyprowski

Date: Tue Mar 10 2026 - 05:49:04 EST


On 09.03.2026 16:13, Jason Gunthorpe wrote:
> On Mon, Mar 09, 2026 at 05:05:02PM +0200, Leon Romanovsky wrote:
>> Regarding failure on unsupported systems, I have tried more than once to
>> make the RDMA fail when the device is known to take the SWIOTLB path
>> in RDMA and cannot operate correctly, but each attempt was met with a
>> cold reception:
>> https://lore.kernel.org/all/d18c454636bf3cfdba9b66b7cc794d713eadc4a5.1719909395.git.leon@xxxxxxxxxx/
> I think alot of that is the APIs used there. It is hard to determine
> if SWIOTLB is possible or coherent is possible, I've also hit these
> things in VFIO and gave up.
>
> However, DMA_ATTR_REQUIRE_COHERENCE can be done properly and not leak
> alot of dangerous APIs to drivers (beyond itself).
>
> It is also more important now with CC systems, I think.

Jason is right. Indeed the rdma/uverbs case needs some extension to
ensure that the coherent mapping is used, what is not possible now. This
however doesn't mean that the DMA_ATTR_CPU_CACHE_OVERLAP is not needed
for that use case too. I'm open to accept both. The only question I have
is which name should we use? We already have DMA_ATTR_CPU_CACHE_CLEAN,
while DMA_ATTR_CPU_CACHE_OVERLAP and
DMA_ATTR_DEBUGGING_IGNORE_CACHELINES were proposed here. The last seems
to be most descriptive.

Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland