[PATCH] arm64: dts: s32g: force S32G RTC as rtc0

[Andrei Botila]

S32G RTC is probed after the RTC on RDB (PCA85073A) so the S32G RTC
ends up on /dev/rtc1. This causes the suspend/resume or hwclock to use
the wrong RTC since it takes by default rtc0.
Force the S32G RTC to be assigned rtc0.

Signed-off-by: Andrei Botila <andrei.botila@xxxxxxxxxxx>
---
 arch/arm64/boot/dts/freescale/s32g2.dtsi        | 4 ++++
 arch/arm64/boot/dts/freescale/s32g3.dtsi        | 4 ++++
 arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi | 6 ++++++
 3 files changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 51d00dac12de..d538876f3854 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -14,6 +14,10 @@ / {
 	#address-cells = <2>;
 	#size-cells = <2>;
 
+	aliases {
+		rtc0 = &rtc0;
+	};
+
 	reserved-memory  {
 		#address-cells = <2>;
 		#size-cells = <2>;
diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index e314f3c7d61d..713c75c63f94 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -15,6 +15,10 @@ / {
 	#address-cells = <0x02>;
 	#size-cells = <0x02>;
 
+	aliases {
+		rtc0 = &rtc0;
+	};
+
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
index 979868f6d2c5..e3e83923b10e 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi
@@ -7,6 +7,12 @@
  *          Larisa Grigore <larisa.grigore@xxxxxxx>
  */
 
+/ {
+	aliases {
+		rtc1 = &pca85073a;
+	};
+};
+
 &pinctrl {
 	can0_pins: can0-pins {
 		can0-grp0 {
-- 
2.52.0