[PATCH] arm64: dts: st: omit unused pinctrl groups from stm32mp25 dtb files
From: Amelie Delaunay
Date: Wed Mar 11 2026 - 07:30:27 EST
stm32mp25-pinctrl.dtsi gathers all pinctrl groups from current and future
STM32MP25-based boards. Some groups may remain unused by any board,
resulting in wasted binary space.
Adding /omit-if-no-ref/ to the groups will remove unused groups from the
device tree blobs.
Use the following regex to update the file:
's/^\t[^:]\+: [^ ]\+ {$/\t\/omit-if-no-ref\/\n&/'
Also, merge the duplicated pinctrl_z node.
Signed-off-by: Amelie Delaunay <amelie.delaunay@xxxxxxxxxxx>
---
arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 44 +++++++++++++++++++++++++--
1 file changed, 42 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
index c34cd33cd855..a7ac9d08484c 100644
--- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
@@ -6,6 +6,7 @@
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
+ /omit-if-no-ref/
eth1_mdio_pins_a: eth1-mdio-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 0, AF10)>; /* ETH_MDC */
@@ -21,6 +22,7 @@ pins2 {
};
};
+ /omit-if-no-ref/
eth1_mdio_sleep_pins_a: eth1-mdio-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* ETH_MDC */
@@ -28,6 +30,7 @@ pins1 {
};
};
+ /omit-if-no-ref/
eth1_rgmii_pins_a: eth1-rgmii-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 15, AF10)>, /* ETH_RGMII_TXD0 */
@@ -62,6 +65,7 @@ pins4 {
};
};
+ /omit-if-no-ref/
eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 15, ANALOG)>, /* ETH_RGMII_TXD0 */
@@ -80,6 +84,7 @@ pins {
};
};
+ /omit-if-no-ref/
eth1_rgmii_pins_b: eth1-rgmii-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 15, AF10)>, /* ETH_RGMII_TXD0 */
@@ -114,6 +119,7 @@ pins4 {
};
};
+ /omit-if-no-ref/
eth1_rgmii_sleep_pins_b: eth1-rgmii-sleep-1 {
pins {
pinmux = <STM32_PINMUX('A', 15, ANALOG)>, /* ETH_RGMII_TXD0 */
@@ -134,6 +140,7 @@ pins {
};
};
+ /omit-if-no-ref/
eth2_rgmii_pins_a: eth2-rgmii-0 {
pins1 {
pinmux = <STM32_PINMUX('C', 7, AF10)>, /* ETH_RGMII_TXD0 */
@@ -175,6 +182,7 @@ pins5 {
};
};
+ /omit-if-no-ref/
eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
pins {
pinmux = <STM32_PINMUX('C', 7, ANALOG)>, /* ETH_RGMII_TXD0 */
@@ -195,6 +203,7 @@ pins {
};
};
+ /omit-if-no-ref/
i2c2_pins_a: i2c2-0 {
pins {
pinmux = <STM32_PINMUX('B', 5, AF9)>, /* I2C2_SCL */
@@ -205,6 +214,7 @@ pins {
};
};
+ /omit-if-no-ref/
i2c2_sleep_pins_a: i2c2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 5, ANALOG)>, /* I2C2_SCL */
@@ -212,6 +222,7 @@ pins {
};
};
+ /omit-if-no-ref/
ospi_port1_clk_pins_a: ospi-port1-clk-0 {
pins {
pinmux = <STM32_PINMUX('D', 0, AF10)>; /* OSPI1_CLK */
@@ -221,12 +232,14 @@ pins {
};
};
+ /omit-if-no-ref/
ospi_port1_clk_sleep_pins_a: ospi-port1-clk-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 0, ANALOG)>; /* OSPI1_CLK */
};
};
+ /omit-if-no-ref/
ospi_port1_cs0_pins_a: ospi-port1-cs0-0 {
pins {
pinmux = <STM32_PINMUX('D', 3, AF10)>; /* OSPI_NCS0 */
@@ -236,12 +249,14 @@ pins {
};
};
+ /omit-if-no-ref/
ospi_port1_cs0_sleep_pins_a: ospi-port1-cs0-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 3, ANALOG)>; /* OSPI_NCS0 */
};
};
+ /omit-if-no-ref/
ospi_port1_io03_pins_a: ospi-port1-io03-0 {
pins {
pinmux = <STM32_PINMUX('D', 4, AF10)>, /* OSPI_IO0 */
@@ -254,6 +269,7 @@ pins {
};
};
+ /omit-if-no-ref/
ospi_port1_io03_sleep_pins_a: ospi-port1-io03-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* OSPI_IO0 */
@@ -263,6 +279,7 @@ pins {
};
};
+ /omit-if-no-ref/
pcie_pins_a: pcie-0 {
pins {
pinmux = <STM32_PINMUX('J', 0, AF4)>;
@@ -270,6 +287,7 @@ pins {
};
};
+ /omit-if-no-ref/
pcie_init_pins_a: pcie-init-0 {
pins {
pinmux = <STM32_PINMUX('J', 0, GPIO)>;
@@ -277,12 +295,14 @@ pins {
};
};
+ /omit-if-no-ref/
pcie_sleep_pins_a: pcie-sleep-0 {
pins {
pinmux = <STM32_PINMUX('J', 0, ANALOG)>;
};
};
+ /omit-if-no-ref/
pwm3_pins_a: pwm3-0 {
pins {
pinmux = <STM32_PINMUX('B', 15, AF7)>; /* TIM3_CH2 */
@@ -292,12 +312,14 @@ pins {
};
};
+ /omit-if-no-ref/
pwm3_sleep_pins_a: pwm3-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 15, ANALOG)>; /* TIM3_CH2 */
};
};
+ /omit-if-no-ref/
pwm8_pins_a: pwm8-0 {
pins {
pinmux = <STM32_PINMUX('J', 5, AF8)>, /* TIM8_CH1 */
@@ -308,6 +330,7 @@ pins {
};
};
+ /omit-if-no-ref/
pwm8_sleep_pins_a: pwm8-sleep-0 {
pins {
pinmux = <STM32_PINMUX('J', 5, ANALOG)>, /* TIM8_CH1 */
@@ -315,6 +338,7 @@ pins {
};
};
+ /omit-if-no-ref/
pwm12_pins_a: pwm12-0 {
pins {
pinmux = <STM32_PINMUX('B', 11, AF9)>; /* TIM12_CH2 */
@@ -324,12 +348,14 @@ pins {
};
};
+ /omit-if-no-ref/
pwm12_sleep_pins_a: pwm12-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 11, ANALOG)>; /* TIM12_CH2 */
};
};
+ /omit-if-no-ref/
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
@@ -349,6 +375,7 @@ pins2 {
};
};
+ /omit-if-no-ref/
sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
@@ -373,6 +400,7 @@ pins3 {
};
};
+ /omit-if-no-ref/
sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('E', 4, ANALOG)>, /* SDMMC1_D0 */
@@ -384,6 +412,7 @@ pins {
};
};
+ /omit-if-no-ref/
spi3_pins_a: spi3-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 7, AF1)>, /* SPI3_SCK */
@@ -398,6 +427,7 @@ pins2 {
};
};
+ /omit-if-no-ref/
spi3_sleep_pins_a: spi3-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 7, ANALOG)>, /* SPI3_SCK */
@@ -406,6 +436,7 @@ pins1 {
};
};
+ /omit-if-no-ref/
tim10_counter_pins_a: tim10-counter-0 {
pins {
pinmux = <STM32_PINMUX('B', 9, AF9)>; /* TIM10_CH1 */
@@ -413,6 +444,7 @@ pins {
};
};
+ /omit-if-no-ref/
tim10_counter_sleep_pins_a: tim10-counter-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 9, ANALOG)>; /* TIM10_CH1 */
@@ -420,6 +452,7 @@ pins {
};
};
+ /omit-if-no-ref/
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
@@ -433,6 +466,7 @@ pins2 {
};
};
+ /omit-if-no-ref/
usart2_idle_pins_a: usart2-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
@@ -443,6 +477,7 @@ pins2 {
};
};
+ /omit-if-no-ref/
usart2_sleep_pins_a: usart2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
@@ -450,6 +485,7 @@ pins {
};
};
+ /omit-if-no-ref/
usart6_pins_a: usart6-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 13, AF3)>, /* USART6_TX */
@@ -465,6 +501,7 @@ pins2 {
};
};
+ /omit-if-no-ref/
usart6_idle_pins_a: usart6-idle-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
@@ -482,6 +519,7 @@ pins3 {
};
};
+ /omit-if-no-ref/
usart6_sleep_pins_a: usart6-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 13, ANALOG)>, /* USART6_TX */
@@ -493,6 +531,7 @@ pins {
};
&pinctrl_z {
+ /omit-if-no-ref/
i2c8_pins_a: i2c8-0 {
pins {
pinmux = <STM32_PINMUX('Z', 4, AF8)>, /* I2C8_SCL */
@@ -503,15 +542,15 @@ pins {
};
};
+ /omit-if-no-ref/
i2c8_sleep_pins_a: i2c8-sleep-0 {
pins {
pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C8_SCL */
<STM32_PINMUX('Z', 3, ANALOG)>; /* I2C8_SDA */
};
};
-};
-&pinctrl_z {
+ /omit-if-no-ref/
spi8_pins_a: spi8-0 {
pins1 {
pinmux = <STM32_PINMUX('Z', 2, AF3)>, /* SPI8_SCK */
@@ -526,6 +565,7 @@ pins2 {
};
};
+ /omit-if-no-ref/
spi8_sleep_pins_a: spi8-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('Z', 2, ANALOG)>, /* SPI8_SCK */
---
base-commit: b6af4f8c4e551d2220787f153e7fea9290d152ea
change-id: 20260311-mp25_pinctrl_omit-73dc784859ba
Best regards,
--
Amelie Delaunay <amelie.delaunay@xxxxxxxxxxx>