[PATCH 09/12] arm64: dts: imx8mp: Use undeprecated reset-gpios
From: Krzysztof Kozlowski
Date: Wed Mar 11 2026 - 12:13:45 EST
Freescale i.MX6 PCIe host controller bindings through referenced
snps,dw-pcie-common.yaml schema already document "reset-gpios", just
like Linux kernel did for a long time. Use the preferred form over
"reset-gpio" deprecated since commit 42694f9f6407 ("dt-bindings: PCI:
add snps,dw-pcie.yaml") in 2021.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi | 2 +-
arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 2 +-
19 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
index f654d866e58c..7d7d96f0642a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-aristainetos3a-som-v1.dtsi
@@ -568,7 +568,7 @@ &mipi_dsi {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio4 20 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
fsl,tx-deemph-gen1 = <0x1f>;
fsl,max-link-speed = <3>;
status = "okay";
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
index 31c33acb560c..001430130e01 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
@@ -530,7 +530,7 @@ dsi_out: endpoint {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
index 7e46537a22a0..bf6c53700057 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
@@ -614,7 +614,7 @@ &pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
fsl,max-link-speed = <3>;
- reset-gpio = <&gpio1 5 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcie0>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
index 3d18c964a22c..68a481965cf0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
@@ -237,7 +237,7 @@ &pcie_phy {
&pcie {
fsl,max-link-speed = <1>;
- reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>; /* GPIO J */
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; /* GPIO J */
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts
index ef012e8365b1..78f0ba14ea5b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk3.dts
@@ -296,7 +296,7 @@ &pcie_phy {
&pcie {
fsl,max-link-speed = <3>;
- reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi
index 3f1e0837f349..1c8a380dc01b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-edm-g.dtsi
@@ -310,7 +310,7 @@ &i2c5 {
&pcie {
pinctrl-0 = <&pinctrl_pcie>;
pinctrl-names = "default";
- reset-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
&pwm1 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index aedc09937716..fcfe89cb76cf 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -769,7 +769,7 @@ &pcie_phy {
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcie0>;
vpcie3v3aux-supply = <®_pcie0>;
supports-clkreq;
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts
index 36cd452f1583..a09b2dc34429 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pro.dts
@@ -34,7 +34,7 @@ &iomuxc {
&pcie {
pinctrl-0 = <&m2_reset_pins>;
pinctrl-names = "default";
- reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts
index d32844c3af05..8e87a9543382 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse.dts
@@ -57,7 +57,7 @@ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x0
&pcie {
pinctrl-0 = <&pcie_eth_pins>;
pinctrl-names = "default";
- reset-gpio = <&gpio4 28 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
status = "okay";
root@0,0 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts b/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts
index 2173a36ff691..393cca39a0d0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-kontron-smarc-eval-carrier.dts
@@ -187,7 +187,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
index 86b8c5af4153..254d6930eca1 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts
@@ -243,7 +243,7 @@ ldb_lvds_ch0: endpoint {
/* Mini PCIe */
&pcie {
- reset-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_vdd_3v3>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
index 0fe52c73fc8f..7a4681578b24 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts
@@ -264,7 +264,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_vcc_3v3_sw>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
index 9317e62304e3..1c2e5be5ed9a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi
@@ -123,7 +123,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
index 76020ef89bf3..89681b21ed36 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi
@@ -154,7 +154,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
status = "okay";
pcie@0,0 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
index 5eb114d2360a..90d15340f935 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw73xx.dtsi
@@ -166,7 +166,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
status = "okay";
pcie@0,0 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
index 7662663ff5da..e37f580fa90e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
@@ -680,7 +680,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio2 17 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
index f90b293c85fc..efdd4b0231af 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
@@ -140,7 +140,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi
index 2b86cc62a41a..fb12bfaa9b77 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw82xx.dtsi
@@ -237,7 +237,7 @@ &pcie_phy {
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie0>;
- reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>;
status = "okay";
pcie@0,0 {
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index d31f8082394f..0f5f924b6a6d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -801,7 +801,7 @@ &pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
/* PCIE_1_RESET# (SODIMM 244) */
- reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
};
&pcie_phy {
--
2.51.0