Re: [PATCH] x86/cpu/centaur: Disable X86_FEATURE_FSGSBASE on Zhaoxin C4600
From: Tony W Wang-oc
Date: Wed Mar 11 2026 - 22:19:32 EST
On 2026/3/6 04:26, Christian Ludloff wrote:
This bug existed only in certain early ucode revisions of the ZX-C/ZX-C+ series CPUs, and is not present in the ZX-D.
Tony,
can you confirm whether F=6 M=1F is affected or not?
(Supposedly that's ZX-D... but the F in the model does
make me wonder/ask.)
Presumably the 6FE and 10690 microcodes which areNo, The four patches with the display date of 20180726 should not have this bug.
out in the wild do not fix the bug, correct?
000006fe_00000000_20110809_8f396f73
000006fe_00000000_20110809_8f397072
000006fe_00000001_20160525_7214d1e1
000006fe_00000001_20170109_25646399
000006fe_00000001_20180726_6e07329b
000006fe_00000001_20180726_6e1e984b
00010690_00000000_20110809_259878a5
00010690_00000001_20160525_3c34fc1a
00010690_00000001_20170109_a8b24dc2
00010690_00000001_20180726_0c55f25d
00010690_00000001_20180726_41faefde
As for making the code conditional for Centaur/Zhaoxin,Sorry, VIA Eden is too old, we haven't been able to find actual hardware to confirm this.
stepping E seems to be when FSGSBASE arrived – and
while there are CPUID dumps for 6FE that say VIA Eden
it is possible that they too have the bug.
As for making the code conditional for Zhaoxin models inYes, ZX-C/ZX-C+ series CPUs have other strings.
the string, that would require more than just C4600 – the
collection of known dumps includes others.
Sincerely!
TonyWWang-oc
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C.