Re: [PATCH v3] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: disable WCN6750 and WPSS

[Dmitry Baryshkov]

On Wed, Mar 11, 2026 at 03:04:08PM +0800, Hangtian Zhu wrote:
> From: Hangtian Zhu <hangtian@xxxxxxxxxxxxxxxx>
> 
> Disable WCN6750 and WPSS on industrial mezzanine. On RB3 Gen2 industrial
> mezzanine platform, PCIe0 lines are moved from WCN6750 to TC9563 pcie
> bridge. Hence disable WPSS and WCN6750 nodes for industrial mezzanine
> platform.

This didn't really improve.

> 
> Signed-off-by: Hangtian Zhu <hangtian@xxxxxxxxxxxxxxxx>
> ---
> This patch depends on:
> [PATCH v4 2/2] arm64: dts: qcom: qcs6490-rb3gen2-industrial-mezzanine: Add second TC9563 PCIe switch node for PCIe1
> https://lore.kernel.org/all/20260305-industrial-mezzanine-pcie-v4-2-1f2c9d1344d7@xxxxxxxxxxxxxxxx/
> 
> Changes in v3:
> - Commit message changes, move Depends-on from commit message to
> cover-letter.
> - Introduce the PCIe architecture of RB3 Gen2 iindustrial mezzanine in
> the cover letter.

There is no cover letter. Also please read
Documentation/process/submitting-patches.rst and stop sending new
versions as replies to the old versions.

> - Link to v2: https://lore.kernel.org/all/20260311031145.2285056-1-hangtian.zhu@xxxxxxxxxxxxxxxx/
> 
> Changes in v2:
> - Commit message changes, change rb3gen2 to RB3 Gen2; wcn6750 to
> WCN6750; wpss to WPSS etc.
> - Link to v1: https://lore.kernel.org/all/20260311023219.2284643-1-hangtian.zhu@xxxxxxxxxxxxxxxx/
> ---
>  .../dts/qcom/qcs6490-rb3gen2-industrial-mezzanine.dtso    | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

-- 
With best wishes
Dmitry