Re: [PATCH v16 07/10] cxl: Update error handlers to support CXL Port devices
From: Jonathan Cameron
Date: Thu Mar 12 2026 - 09:05:18 EST
On Wed, 11 Mar 2026 10:37:33 -0500
"Bowman, Terry" <terry.bowman@xxxxxxx> wrote:
> On 3/9/2026 9:05 AM, Jonathan Cameron wrote:
> > On Mon, 2 Mar 2026 14:36:45 -0600
> > Terry Bowman <terry.bowman@xxxxxxx> wrote:
> >
> >> CXL Protocol trace logging is called for Endpoints in cxl_handle_ras() and
> >> cxl_handle_cor_ras(). Trace logging support for CXL Port devices is missing.
> >>
> >> CXL Endpoint trace logging utilizes a separate trace routine than CXL Port
> >> device handling. Using is_cxl_memdev(), determine if the device is a CXL EP
> >> or one of the CXL Port devices.
> >>
> >> Update cxl_handle_ras() and cxl_handle_cor_ras() to call the CXL Port trace
> >> logging function. Change cxl_handle_ras() return values to be pci_ers_result_t
> >> type.
> >
> > Why this last bit?
> >
>
> You requested in previous review this should return a value more meaningful than bool.
> I changed to return pci_ers_result_t.
>
> https://lore.kernel.org/linux-cxl/20260205171346.00001e6b@xxxxxxxxxx/
Ah. I was probably thinking errnos.
Maybe not appropriate. Given how it is used, a bool was probably the right answer.
Sorry!
J
>
>
> >>
> >> Check for invalid ras_base and add log messages if NULL.
> >>
> >> Signed-off-by: Terry Bowman <terry.bowman@xxxxxxx>