Re: [PATCH] cxl/hdm: Avoid DVSEC fallback after region teardown

From: Koralahalli Channabasappa, Smita

Date: Thu Mar 12 2026 - 16:55:40 EST


On 3/12/2026 12:42 PM, Dan Williams wrote:
Koralahalli Channabasappa, Smita wrote:
[..]
"do not teardown auto regions" should squash this crop of setup bugs.

Looking at this more closely for patch 2, if I'm not wrong, I think the
problem is that cxl_setup_hdm_decoder_from_dvsec() is not setting up the
interleave_granularity on the decoder. It inherits the default PAGE_SIZE
(4096) from cxl_decoder_init(), and construct_region() then copies that
stale value into the region params.

So even in a DVSEC emulation case, the IG would be whatever
cxl_decoder_init() defaulted to, not what the actual configuration is right?

Remember that CXL 1.1 DVSEC range registers do not support interleave.
Interleaving was a CXL 2.0 feature.

So in the case where HDM decoders are actually disabled and DVSEC Range
registers are sufficient, the bug is in cxl_port_setup_targets().
Specifically, when interleave_ways == 1 then interleave_granularity does
not matter. It is ok for CFMWS and the region granularity numbers to
mismatch in that case.

So I would not expect that ig mismatch matters after:

ce32b0c9c522 cxl: core/region - ignore interleave granularity when ways=1

...did that miss an additional location where we are doing granularity
checks?

What's actually triggering my error is likely the disabled decoder flag. The log shows:

[] cxl region0: pci0000:e0:port1 cxl_port_setup_targets expected iw: 1 ig: 4096 [mem 0x850000000-0x284fffffff flags 0x200]
[] cxl region0: pci0000:e0:port1 cxl_port_setup_targets got iw: 1 ig: 256 state: disabled 0x850000000:0x284fffffff

The decoder is in disabled state because cxl_decoder_reset() clears CXL_DECODER_F_ENABLE during region teardown.

So ce32b0c9c522 is handling the IG issue correctly and Im probably hitting failing condition with the disabled flag. I will spend some more time confirming this.


Is the second patch about fixing cxl_setup_hdm_decoder_from_dvsec() to
properly set the interleave granularity?

I would say just clean up the changelog per the feedback and we can
start a separate thread to fixup DVSEC support.

With the suggested changelog updates you can also add:

Reviewed-by: Dan Williams <dan.j.williams@xxxxxxxxx>

Sure thanks on this. I will send out v2 just with these changes and rewriting the commit message.

Thanks
Smita