Re: [PATCH 2/3] arm64: dts: qcom: Commonize Glymur CRD DTSI

[Gopikrishna Garmidi]

On 3/12/2026 8:48 PM, Dmitry Baryshkov wrote:
> On Thu, Mar 12, 2026 at 02:10:32PM +0530, Gopikrishna Garmidi wrote:
> > Hi Dmitry Baryshkov,
> > > > Commonize the existing Glymur DTSI to allow reuse across the different
> > > > Glymur SKUs.
> > >
> > > Is Mahua a Glymur SKU?
> > Yes, Mahua is a variant of Glymur SoC with the same silicon but with the
> > third CPU cluster disabled.
>
> Your next patch points out that there are more differences than just a
> disablement of the CPU cluster. I'd assume that Mahua is a sister
> architecture, but not the same silicon. Please rephrase your commit
> message without making assumptions and being more explicit that it is
> going to be shared with Mahua, a different SoC.

Hi Dmitry,
Thanks for taking time to review the series :)

Will fix this in the next revision of the patch series.


> > > > Also leave PCIe3b nodes disabled until the PCIe3b PHY init sequence
> > > > support gets added, since it's disabled at the UEFI level by default.
> > > >
> > > > Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@xxxxxxxxxxxxxxxx>
> > > > ---
> > > >    arch/arm64/boot/dts/qcom/glymur-crd.dts       | 586 +-----------------
> > > >    .../qcom/{glymur-crd.dts => glymur-crd.dtsi}  |   7 -
> > > >    2 files changed, 1 insertion(+), 592 deletions(-)
> > > >    copy arch/arm64/boot/dts/qcom/{glymur-crd.dts => glymur-crd.dtsi} (99%)
Best regards,
Gopikrishna Garmidi.