Re: [PATCH v3 04/27] soc: qcom: ubwc: add helper controlling AMSBC enablement

From: Konrad Dybcio

Date: Fri Mar 13 2026 - 06:21:30 EST


On 3/12/26 2:29 PM, Dmitry Baryshkov wrote:
> Adreno and MDSS drivers need to know whether to enable AMSBC. Add
> separate helper, describing that feature.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
> ---
> include/linux/soc/qcom/ubwc.h | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h
> index 8355ffe40f88..83d2c2a7116c 100644
> --- a/include/linux/soc/qcom/ubwc.h
> +++ b/include/linux/soc/qcom/ubwc.h
> @@ -116,4 +116,9 @@ static inline u32 qcom_ubwc_version_tag(const struct qcom_ubwc_cfg_data *cfg)
> return 0;
> }
>
> +static inline bool qcom_ubwc_enable_amsbc(const struct qcom_ubwc_cfg_data *cfg)
> +{
> + return cfg->ubwc_enc_version >= UBWC_3_0;

Note KGSL doesn't enable AMSBC for UBWC_6_0 and A8xx (but does for
A8xx+ UBWC3..5)

The initial commit adding A6xx support to KGSL has this hunk:

+ case KGSL_UBWC_3_0:
+ mode = 0;
+ amsbc = 1; /* Only valid for A640 and A680 */
+ break;

That was in a time where A640/680 (8150/8180 respectively, with UBWC3_x)
may have still been under heavy development - this initial driver was
targeting A630/SDM845 (UBWC2), so perhaps that's not really meaningful


Konrad