[PATCH] Subject: [v2] mtd: spi-nor: gigadevice: Add support for GD25LQ255E

[Weimin Wu]

Add support for the GigaDevice GD25LQ255E (JEDEC ID c8 60 19),
a 256Mbit (32MB) SPI NOR flash chip which supports SFDP.

The chip supports 4K sector erase, dual read, and quad read modes.

Link: https://download.gigadevice.com/Datasheet/DS-00562-GD25LQ255E-Rev1.2.pdf

Without this patch, The WP status cannot be obtained using flashrom:
device:/ # flashrom --wp-status
...
linux_mtd_wp_read_cfg:
ioctl: Operation not supported on transport endpoint
Failed to get WP status: failed to read the current WP configuration

and with this patch:
device:/ # flashrom --wp-status
...
Protection range: start=0x00000000 length=0x00000000 (none)
Protection mode: disabled
SUCCESS

Signed-off-by: Weimin Wu <wuweimin@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>

---
Changes in v2:
- Following the recommendation of v1, remove name and no_sfdp_flags
  parameter, and SPI_NOR_QUAD_PP flag bit.
- Remove size parameter to to make the `spi_nor_needs_sfdp()`
  function return true.
- Link to v1: https://patchwork.ozlabs.org/project/linux-mtd/patch/20260213144133.1778932-1-wuweimin@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/

This flash memory has been successfully tested on a Chromebook device running the Intel Patherlake platform, which is currently under development.
---
---
 drivers/mtd/spi-nor/gigadevice.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c
index ef1edd0ad..9774f7fe7 100644
--- a/drivers/mtd/spi-nor/gigadevice.c
+++ b/drivers/mtd/spi-nor/gigadevice.c
@@ -82,6 +82,9 @@ static const struct flash_info gigadevice_nor_parts[] = {
 		.size = SZ_16M,
 		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
 		.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+	}, {
+		.id = SNOR_ID(0xc8, 0x60, 0x19),
+		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
 	},
 };
 
-- 
2.43.0