Re: [PATCH 3/4] dt-bindings: clock: qcom: Add CMN PLL support for IPQ8074
From: Krzysztof Kozlowski
Date: Fri Mar 13 2026 - 09:52:34 EST
On Wed, Mar 11, 2026 at 07:39:40PM +0100, Christian Marangi wrote:
> From: John Crispin <john@xxxxxxxxxxx>
>
> The CMN PLL block in the IPQ8074 SoC takes 48 MHz as the reference
> input clock. Its output clocks are the bias_pll_cc_clk (300 MHz) and
> bias_pll_nss_noc_clk (416.5 MHz) clocks used by the networking
> subsystem.
>
> Add the related compatible for IPQ8074 to the ipq9574-cmn-pll
> generic schema.
>
> Signed-off-by: John Crispin <john@xxxxxxxxxxx>
> Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
> ---
> .../bindings/clock/qcom,ipq9574-cmn-pll.yaml | 1 +
> include/dt-bindings/clock/qcom,ipq8074-cmn-pll.h | 15 +++++++++++++++
> 2 files changed, 16 insertions(+)
> create mode 100644 include/dt-bindings/clock/qcom,ipq8074-cmn-pll.h
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxxxxx>
Best regards,
Krzysztof