Re: [PATCH v3 4/7] gpio: gpiolib: fix allocation order in hierarchical IRQ domains

[Tommaso Merciai]

Hi Oleksij,

On 3/13/26 14:08, Oleksij Rempel wrote:
> Hi Tommaso,
>
> On Fri, Mar 13, 2026 at 11:42:34AM +0100, Tommaso Merciai wrote:
> > Hi Oleksij,
> > Thanks for your patch.
> >
> > I'm working on DSI support for RZ/G3E
> >
> > from this morning rebasing on top of next-20260312 I'm seeing
> > the following:
> > I found out the the issue is related to the interrupt of the adv7535
> > bridge:
> >
> >          adv7535: hdmi1@3d {
> >                  compatible = "adi,adv7535";
> >                  ...
> >                  ...
> >                  interrupts-extended = <&pinctrl RZG3E_GPIO(L, 4) IRQ_TYPE_EDGE_FALLING>;
> >
> > RZ/G3E is using:
> >   - drivers/pinctrl/renesas/pinctrl-rzg2l.c
> >
> > Reverting this patch fix the issue.
> > (git revert a23463beb3d5)
>
> Thank you for the feedback! If I understand the problem correctly, the
> adv7535 is asserting its IRQ line early during probe, which creates an
> irq storm due to a missing handler.
>
> My patch moved irq_domain_set_info() after the parent allocation. When
> the parent allocates the IRQ, the pending hardware interrupt fires
> immediately. Because the child descriptor isn't fully configured yet, it
> routes to handle_bad_irq. This fails to acknowledge the hardware
> interrupt, locking up the CPU and causing the RCU stall.
>
> I hope splitting the irq_domain_set_info() should fix the regression.
> Can you please test if this change resolve the RCU stalls on your setup:

Thanks for sharing.

> diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
> index 13dd97344b26..376daeddbbbb 100644
> --- a/drivers/gpio/gpiolib.c
> +++ b/drivers/gpio/gpiolib.c
> @@ -1628,6 +1628,9 @@ static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
>   	}
>   	gpiochip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
>   
> +	irq_set_handler(irq, girq->handler);
> +	irq_set_handler_data(irq, gc);
> +
>   	/* This parent only handles asserted level IRQs */
>   	ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
>   					      parent_hwirq, parent_type);
> @@ -1655,13 +1658,7 @@ static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
>   	 * We set handle_bad_irq because the .set_type() should
>   	 * always be invoked and set the right type of handler.
>   	 */
> -	irq_domain_set_info(d,
> -			    irq,
> -			    hwirq,
> -			    gc->irq.chip,
> -			    gc,
> -			    girq->handler,
> -			    NULL, NULL);
> +	irq_domain_set_hwirq_and_chip(d, irq, hwirq, gc->irq.chip, gc);
>   	irq_set_probe(irq);
>   
>   	return 0;

Tested on RZ/G3E + adv7535.

With this fix all is working fine on my side.
I'm not more seeing the seeing the RCU stall.

Thanks.

Kind Regards,
Tommaso