Re: [PATCH v2 6/7] arm64: dts: qcom: Add Arduino Monza (VENTUNO Q) board support
From: Dmitry Baryshkov
Date: Fri Mar 13 2026 - 12:24:05 EST
On Fri, Mar 13, 2026 at 10:38:21AM +0000, Srinivas Kandagatla wrote:
> From: Loic Poulain <loic.poulain@xxxxxxxxxxxxxxxx>
>
> Add device tree support for the Arduino VENTUNO Q board,
> based on the Qualcomm QCS8300 (Monaco) SoC.
>
> The board features a Qualcomm Monza SoM and integrates various
> peripherals, including:
> - USB Type‑C connector with dual‑role support
> - ADV7535 DSI‑to‑HDMI bridge
> - MAX98091 audio codec
> - 2.5G Ethernet PHY (HSGMII)
> - PCIe0 (to onboard WiFi chipset and USB bridge)
> - PCIe1 (to M2/nvme)
> - Button (via GPIO‑keys)
>
> Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxxxxxxxx>
> Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxxxxxxxx>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@xxxxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> .../boot/dts/qcom/monaco-arduino-monza.dts | 466 ++++++++++++++++++
> arch/arm64/boot/dts/qcom/monaco.dtsi | 55 +++
> 3 files changed, 522 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/monaco-arduino-monza.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
> index 53cbc08d4df4..837adf569485 100644
> --- a/arch/arm64/boot/dts/qcom/monaco.dtsi
> +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
> @@ -2885,6 +2885,61 @@ lpass_tlmm: pinctrl@3440000 {
NIt: this might have better be squashed into the patch adding LPI TLMM.
Nevertheless,
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&lpass_tlmm 0 0 23>;
> +
> + quad_mclk_active: quad-mclk-state {
> + clk-pins {
> + pins = "gpio5";
> + function = "ext_mclk1_c";
> + drive-strength = <8>;
> + bias-disable;
> + };
> + };
> +
> + quad_mi2s_active: quad-active-state {
> + data-pins {
> + pins = "gpio2", "gpio3";
> + function = "qua_mi2s_data";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + sclk-pins {
> + pins = "gpio0";
> + function = "qua_mi2s_sclk";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + ws-pins {
> + pins = "gpio1";
> + function = "qua_mi2s_ws";
> + drive-strength = <8>;
> + bias-disable;
> + };
> + };
> +
> + lpi_i2s4_active: lpi_i2s4-active-state {
> + data0-pins {
> + pins = "gpio17";
> + function = "i2s4_data";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + clk-pins {
> + pins = "gpio12";
> + function = "i2s4_clk";
> + drive-strength = <8>;
> + bias-disable;
> + };
> +
> + ws-pins {
> + pins = "gpio13";
> + function = "i2s4_ws";
> + drive-strength = <8>;
> + bias-disable;
> + };
> + };
> };
>
> lpass_ag_noc: interconnect@3c40000 {
> --
> 2.47.3
>
--
With best wishes
Dmitry