Re: [PATCH spi-next 04/11] spi: spi-fsl-lpspi: fsl_lpspi_set_watermark(): use FIELD_PREP() to encode FIFO Status register
From: Mark Brown
Date: Mon Mar 16 2026 - 14:50:47 EST
On Mon, Mar 16, 2026 at 07:31:04PM +0100, Marc Kleine-Budde wrote:
> On 16.03.2026 18:16:01, Mark Brown wrote:
> > Oh, dear, so that's potentially going to go badly if there's a SoC with
> > a bigger FIFO that didn't also increase the watermark field width. We
> > should at least warn about that, and ideally do something sensible.
> Good idea, I'll add a warning if the FIFO is bigger than the watermark
> field.
> To handle this situation I see 2 options:
> - warning + limit the FIFO to the usable size due to the currently
> hard-coded watermark width - this will result in reduced throughput
> - increase the watermark mask to 8 bits - which is basically how the
> unpatched driver works.
> As outlined in my previous mail, the other code in the driver takes
> care that the watermark stays within the limits.
I guess it depends how optimistic we are about hardware engineers
keeping the FIFO and watermark depths in sync. The first option is more
defensive, but like you say it'll hit performance on future devices that
do expand the FIFO. I guess I have a slight preference for that?
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