Re: [PATCH v3 2/3] arm64: dts: qcom: Introduce Eliza Soc base dtsi

[Konrad Dybcio]

On 3/18/26 11:45 AM, Krzysztof Kozlowski wrote:
> On 18/03/2026 11:19, Abel Vesa wrote:
>> +		};

[...]

>> +		cpu_pd7: power-domain-cpu7 {
>> +			#power-domain-cells = <0>;
>> +			power-domains = <&cluster_pd>;
>> +			domain-idle-states = <&cluster2_c4>;
> 
> ...here.
> 
> Each cluster has different entry/exit latencies, but @Konrad insisted to
> represent here only one cluster. I believe it is not correct, but I am
> fine with it, however my question remains: how does this work in such
> case - which domain idle state is really used?
> 
> It's more of a question to Konrad since he wanted one cluster...

I *believe* cpuidle functions fine as-is (i.e. each CPU gets assigned the
correct idle states etc. and the system/"one big cluster" PD is also correct)..
I am open to being proven wrong

Konrad