Re: [PATCH v3 0/8] Add support for LS7A LPC IRQ for MIPS Loongson systems

[Huacai Chen]

Hi, Icenowy,

On Sun, Mar 15, 2026 at 12:28 AM Icenowy Zheng <zhengxingda@xxxxxxxxxxx> wrote:
>
> This patchset tries to add support for Loongson 7A1000 PCH's LPC
> interrupt controller to MIPS-based Loongson systems.
>
> LPC, from software's perspective of view, is just ISA, so the interrupts
> should be handled as legacy ones occupying the lowest 0-15 IRQ numbers.
> Despite the current PCH LPC driver for ACPI-based LoongArch Loongson
> machines handled it, the setup is fragile and depends on its specific
> setup sequence (allocating the LPC IRQs first, and then allocate the
> parent IRQ at PCH PIC). The refactor of extracting parent IRQ allocation
> breaks this fragile sequence, so the first two commits is created to
> address this issue (by reserving ISA interrupts from the dynamic
> allocation space).
>
> Then the remaining commits are just adding OF(DT) based initialization
> of PCH LPC interrupt controller, like what happened on PCH PIC.
>
> Tested on a Haier Boyue G51 system with legacy i8042 keyboard/mouse as
> integrated ones.
>
> Changes in v3:
> - Override arch_dynirq_lower_bound() in MIPS Loongson64 / LoongArch
>   instead of modifying the global version of function.
> - Added Rob's R-b to the binding patch.
>
> Changes in v2:
> - Rebased on top of `irq-drivers-2026-02-09` tag.
> - Compatible changed to `loongson,ls7a-lpc` .
> - Merged the patch for conditionally build of ACPI code to the patch
>   introducing OF code.
> - Sorted function variable definitions.
> - Reworded some commit messages as Thomas Glexiner suggests.
> - Added __init to the LPC irqchip OF initialization code to prevent
>   section mismatch.
>
> Icenowy Zheng (8):
>   MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs
>   LoongArch: Override arch_dynirq_lower_bound to reserve LPC IRQs
Use upper case for the first word, which means....

>   dt-bindings: interrupt-controller: add LS7A PCH LPC
s/add/Add/g

>   irqchip/loongson-pch-lpc: extract non-ACPI-related code from ACPI init
s/extract/Extract/g

>   irqchip/loongson-pch-lpc: add OF init code
s/add/Add/g

>   irqchip/loongson-pch-lpc: enable building on MIPS Loongson64
s/enable/Enable/g

>   MIPS: Loongson64: dts: sort nodes
s/sort/Sort/g

>   MIPS: Loongson64: dts: add node for LS7A PCH LPC
s/add/Add/g

In addition, I think the last two patches should be in another series
because they won't go to the irqchip tree.

Huacai

>
>  .../loongson,pch-lpc.yaml                     | 52 +++++++++++
>  arch/loongarch/kernel/irq.c                   |  6 ++
>  arch/mips/boot/dts/loongson/ls7a-pch.dtsi     | 17 +++-
>  arch/mips/loongson64/init.c                   |  6 ++
>  drivers/irqchip/Kconfig                       |  1 -
>  drivers/irqchip/irq-loongson-pch-lpc.c        | 87 ++++++++++++++-----
>  6 files changed, 144 insertions(+), 25 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,pch-lpc.yaml
>
> --
> 2.52.0
>