Re: [PATCH v7 18/31] gpu: nova-core: add MCTP/NVDM protocol types for firmware communication

[John Hubbard]

On 3/18/26 5:36 AM, Gary Guo wrote:
> On Wed Mar 18, 2026 at 12:21 AM GMT, Danilo Krummrich wrote:
>> On Wed Mar 18, 2026 at 1:01 AM CET, John Hubbard wrote:
>>> On 3/17/26 3:53 PM, John Hubbard wrote:
>>> ...
>>>> +bitfield! {
>>>> +    pub(crate) struct MctpHeader(u32), "MCTP transport header for NVIDIA firmware messages." {
>>>> +        31:31 som as bool, "Start-of-message bit.";
>>>> +        30:30 eom as bool, "End-of-message bit.";
>>>> +        29:28 seq as u8, "Packet sequence number.";
>>>> +        23:16 seid as u8, "Source endpoint ID.";
>>>
>>> hmmm, I seem to remember my very slightly younger self insisting
>>> that fields be listed from lowest to highest bits. And now I've
>>> violated that in both headers in this patch. arghh
>>
>> My now slightly older self still thinks that what you have above is actually the
>> way to go. So, I think your current self intuitively did the right thing. :P
>>
>> It should be either
>>
>> 	31:16
>> 	15:0
> 
> This is my preferred form as it closer to what hardware world uses and the order
> is consistent with most data sheets.
> 
> Best,
> Gary
> 

I'll let this patch alone in v8, then, as the most important
thing for me is the bit order. I don't worry so much about the
vertical order in which bitfields are listed.

Whew, I do hope this (along with my recent rustfmtcheck sins)
are the only remaining items. Getting close...

>>
>> or it should be
>>
>> 	0:15
>> 	16:31
>>
>> with a strong preference for the former, but this
>>
>> 	15:0
>> 	31:16
>>
>> still looks pretty odd to me.
> 

I will concede that the above is an acquired taste. :)

thanks,
-- 
John Hubbard