[PATCH v1] irqchip: fix mask alignment in gic-v2m

[Javier Achirica]

commit 2ef3886ce626dcdab0cbc452dbbebc19f57133d8 ("irqchip/gic-v2m: Handle
Multiple MSI base IRQ Alignment") introduced a regression in kernel 6.12.58
affecting PCIe devices using GICv2m MSI on a Qualcomm (arm64) platform.

It uses nr_irqs parameter to generate a mask to align the MSI base address,
but this mask isn't properly generated when nr_irqs isn't a power of two.
This bug was found while adding support for the TCL HH500V router in OpenWrt.

This patch fixes the issue, can be cleanly applied to the 6.12.x tree and,
with a small fuzz, to 7.0.x.

Signed-off-by: Javier Achirica <jachirica@xxxxxxxxx>
Cc: stable@xxxxxxxxxxxxxxx
---
--- a/drivers/irqchip/irq-gic-v2m.c     2026-03-20 09:45:22.170192561 +0100
+++ b/drivers/irqchip/irq-gic-v2m.c     2026-03-20 09:45:26.284210783 +0100
@@ -158,7 +158,7 @@
        struct v2m_data *v2m = NULL, *tmp;
        int hwirq, i, err = 0;
        unsigned long offset;
-       unsigned long align_mask = nr_irqs - 1;
+       unsigned long align_mask = roundup_pow_of_two(nr_irqs) - 1;

        spin_lock(&v2m_lock);
        list_for_each_entry(tmp, &v2m_nodes, entry) {